Lines Matching defs:soc
3 * drivers/soc/tegra/pmc.c
52 #include <soc/tegra/common.h>
53 #include <soc/tegra/fuse.h>
54 #include <soc/tegra/pmc.h>
61 #include <dt-bindings/soc/tegra-pmc.h>
398 * @soc: pointer to SoC data structure
435 const struct tegra_pmc_soc *soc;
551 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps)
559 return (pmc->soc && pmc->soc->powergates[id]);
571 if (!pmc || !pmc->soc || !name)
574 for (i = 0; i < pmc->soc->num_powergates; i++) {
578 if (!strcmp(name, pmc->soc->powergates[i]))
653 if (id == TEGRA_POWERGATE_3D && pmc->soc->has_gpu_clamps)
663 err = pmc->soc->powergate_set(pmc, id, new_state);
682 if (pmc->soc->has_gpu_clamps) {
825 if (pg->pmc->soc->needs_mbist_war)
1051 if (pmc->soc && cpuid < pmc->soc->num_cpu_powergates)
1052 return pmc->soc->cpu_powergates[cpuid];
1106 value = tegra_pmc_scratch_readl(pmc, pmc->soc->regs->scratch0);
1120 tegra_pmc_scratch_writel(pmc, value, pmc->soc->regs->scratch0);
1178 for (i = 0; i < pmc->soc->num_powergates; i++) {
1183 seq_printf(s, " %9s %7s\n", pmc->soc->powergates[i],
1537 for (i = 0; i < pmc->soc->num_io_pads; i++)
1538 if (pmc->soc->io_pads[i].id == id)
1539 return &pmc->soc->io_pads[i];
1725 if (pmc->soc->has_impl_33v_pwr) {
1770 if (pmc->soc->has_impl_33v_pwr)
1907 if (pmc->soc->max_wake_events > 0) {
1908 pmc->wake_type_level_map = bitmap_zalloc(pmc->soc->max_wake_events, GFP_KERNEL);
1912 pmc->wake_type_dual_edge_map = bitmap_zalloc(pmc->soc->max_wake_events, GFP_KERNEL);
1916 pmc->wake_sw_status_map = bitmap_zalloc(pmc->soc->max_wake_events, GFP_KERNEL);
1920 pmc->wake_cntrl_level_map = bitmap_zalloc(pmc->soc->max_wake_events, GFP_KERNEL);
1925 if (pmc->soc->init)
1926 pmc->soc->init(pmc);
1939 if (!pmc->soc->has_tsense_reset)
2011 return pmc->soc->num_io_pads;
2019 return pmc->soc->io_pads[group].name;
2029 *pins = &pmc->soc->io_pads[group].id;
2141 if (!pmc->soc->num_pin_descs)
2145 tegra_pmc_pctl_desc.pins = pmc->soc->pin_descs;
2146 tegra_pmc_pctl_desc.npins = pmc->soc->num_pin_descs;
2165 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status);
2166 value &= pmc->soc->regs->rst_source_mask;
2167 value >>= pmc->soc->regs->rst_source_shift;
2169 if (WARN_ON(value >= pmc->soc->num_reset_sources))
2172 return sprintf(buf, "%s\n", pmc->soc->reset_sources[value]);
2182 value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status);
2183 value &= pmc->soc->regs->rst_level_mask;
2184 value >>= pmc->soc->regs->rst_level_shift;
2186 if (WARN_ON(value >= pmc->soc->num_reset_levels))
2189 return sprintf(buf, "%s\n", pmc->soc->reset_levels[value]);
2199 if (pmc->soc->reset_sources) {
2207 if (pmc->soc->reset_levels) {
2234 const struct tegra_pmc_soc *soc = pmc->soc;
2242 for (i = 0; i < soc->num_wake_events; i++) {
2243 const struct tegra_wake_event *event = &soc->wake_events[i];
2295 if (i == soc->num_wake_events)
2503 pmc->irq.irq_set_type = pmc->soc->irq_set_type;
2504 pmc->irq.irq_set_wake = pmc->soc->irq_set_wake;
2709 num_clks = pmc->soc->num_pmc_clks;
2710 if (pmc->soc->has_blink_output)
2730 for (i = 0; i < pmc->soc->num_pmc_clks; i++) {
2733 data = pmc->soc->pmc_clks_data + i;
2753 if (pmc->soc->has_blink_output) {
2844 if (pmc->soc->has_usb_sleepwalk) {
2869 * register mapping and setup the soc data pointer. If these
2872 if (WARN_ON(!pmc->base || !pmc->soc))
2889 if (pmc->soc->has_single_mmio_aperture) {
3018 if (pmc->soc->set_wake_filters)
3019 pmc->soc->set_wake_filters(pmc);
3062 for (i = 0; i < pmc->soc->max_wake_events; i++)
3076 for (i = 0; i < pmc->soc->max_wake_events; i++)
3089 for (i = 0; i < pmc->soc->max_wake_events; i++)
3101 bitmap_zero(pmc->wake_sw_status_map, pmc->soc->max_wake_events);
3103 for (i = 0; i < pmc->soc->max_wake_vectors; i++) {
3117 for (i = 0; i < pmc->soc->max_wake_vectors; i++) {
3157 for (i = 0; i < pmc->soc->max_wake_vectors; i++) {
3173 pmc->wake_sw_status_map, pmc->soc->max_wake_events);
3175 pmc->wake_type_level_map, pmc->soc->max_wake_events);
3954 TEGRA_IO_PAD(TEGRA_IO_PAD_SOC_GPIO53, 16, 0x74, 0x78, UINT_MAX, "soc-gpio53"),
3958 TEGRA_IO_PAD(TEGRA_IO_PAD_SOC_GPIO12, 20, 0x74, 0x78, UINT_MAX, "soc-gpio12"),
3959 TEGRA_IO_PAD(TEGRA_IO_PAD_SOC_GPIO13, 21, 0x74, 0x78, UINT_MAX, "soc-gpio13"),
3960 TEGRA_IO_PAD(TEGRA_IO_PAD_SOC_GPIO10, 22, 0x74, 0x78, UINT_MAX, "soc-gpio10"),
4006 TEGRA_IO_PIN_DESC(TEGRA_IO_PAD_SOC_GPIO53, "soc-gpio53"),
4010 TEGRA_IO_PIN_DESC(TEGRA_IO_PAD_SOC_GPIO12, "soc-gpio12"),
4011 TEGRA_IO_PIN_DESC(TEGRA_IO_PAD_SOC_GPIO13, "soc-gpio13"),
4012 TEGRA_IO_PIN_DESC(TEGRA_IO_PAD_SOC_GPIO10, "soc-gpio10"),
4279 if (!pmc->soc->supports_core_domain)
4319 saved = readl(pmc->base + pmc->soc->regs->scratch0);
4326 writel(value, pmc->base + pmc->soc->regs->scratch0);
4327 value = readl(pmc->base + pmc->soc->regs->scratch0);
4336 writel(saved, pmc->base + pmc->soc->regs->scratch0);
4402 pmc->soc = match->data;
4404 if (pmc->soc->maybe_tz_only)
4408 for (i = 0; i < pmc->soc->num_powergates; i++)
4409 if (pmc->soc->powergates[i])
4418 pmc->soc->setup_irq_polarity(pmc, np, invert);