soc/qcom/ramp_controller.c

71  * @qrc: Main driver structure
75 static int rc_wait_for_update(struct qcom_ramp_controller *qrc)
77 	const struct qcom_ramp_controller_desc *d = qrc->desc;
78 	struct regmap *r = qrc->regmap;
92  * @qrc: Main driver structure
97 static int rc_set_cfg_update(struct qcom_ramp_controller *qrc, u8 ce)
99 	const struct qcom_ramp_controller_desc *d = qrc->desc;
100 	struct regmap *r = qrc->regmap;
141  * @qrc: Main driver structure
148 static int rc_write_cfg(struct qcom_ramp_controller *qrc,
156 	ret = rc_wait_for_update(qrc);
161 	ret = regmap_multi_reg_write(qrc->regmap, seq, nsids);
167 		ret = rc_set_cfg_update(qrc, (u8)ce - i);
177  * @qrc: Main driver structure
181 static int rc_ramp_ctrl_enable(struct qcom_ramp_controller *qrc)
183 	const struct qcom_ramp_controller_desc *d = qrc->desc;
187 		ret = rc_write_cfg(qrc, &d->cfg_ramp_en[i], RC_DCVS_CFG_SID, 1);
197  * @qrc: Main driver structure
205 static int qcom_ramp_controller_start(struct qcom_ramp_controller *qrc)
207 	const struct qcom_ramp_controller_desc *d = qrc->desc;
211 	ret = rc_write_cfg(qrc, d->cfg_lmh_sid, RC_LMH_SID, d->num_lmh_sids);
215 	ret = rc_write_cfg(qrc, d->cfg_dfs_sid, RC_DFS_SID, d->num_dfs_sids);
219 	ret = rc_write_cfg(qrc, d->cfg_link_sid, RC_LINK_SID, d->num_link_sids);
224 	return rc_ramp_ctrl_enable(qrc);
287 	struct qcom_ramp_controller *qrc;
294 	qrc = devm_kmalloc(&pdev->dev, sizeof(*qrc), GFP_KERNEL);
295 	if (!qrc)
298 	qrc->desc = device_get_match_data(&pdev->dev);
299 	if (!qrc->desc)
302 	qrc->regmap = devm_regmap_init_mmio(&pdev->dev, base, &qrc_regmap_config);
303 	if (IS_ERR(qrc->regmap))
304 		return PTR_ERR(qrc->regmap);
306 	platform_set_drvdata(pdev, qrc);
308 	return qcom_ramp_controller_start(qrc);
313 	struct qcom_ramp_controller *qrc = platform_get_drvdata(pdev);
316 	ret = rc_write_cfg(qrc, qrc->desc->cfg_ramp_dis,
317 			   RC_DCVS_CFG_SID, qrc->desc->num_ramp_dis);