Lines Matching defs:qe_ic

3  * arch/powerpc/sysdev/qe_lib/qe_ic.c
46 struct qe_ic {
235 static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
240 static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d)
247 struct qe_ic *qe_ic = qe_ic_from_irq_data(d);
254 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
255 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
263 struct qe_ic *qe_ic = qe_ic_from_irq_data(d);
270 temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg);
271 qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg,
297 /* Exact match, unless qe_ic node is NULL */
305 struct qe_ic *qe_ic = h->host_data;
318 chip = &qe_ic->hc_irq;
320 irq_set_chip_data(virq, qe_ic);
335 static unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
339 BUG_ON(qe_ic == NULL);
342 irq = qe_ic_read(qe_ic->regs, QEIC_CIVEC) >> 26;
347 return irq_linear_revmap(qe_ic->irqhost, irq);
351 static unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
355 BUG_ON(qe_ic == NULL);
358 irq = qe_ic_read(qe_ic->regs, QEIC_CHIVEC) >> 26;
363 return irq_linear_revmap(qe_ic->irqhost, irq);
368 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
369 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
381 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
382 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
394 struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
398 cascade_irq = qe_ic_get_high_irq(qe_ic);
400 cascade_irq = qe_ic_get_low_irq(qe_ic);
413 struct qe_ic *qe_ic;
423 qe_ic = devm_kzalloc(dev, sizeof(*qe_ic), GFP_KERNEL);
424 if (qe_ic == NULL)
427 qe_ic->regs = devm_ioremap(dev, res->start, resource_size(res));
428 if (qe_ic->regs == NULL) {
433 qe_ic->hc_irq = qe_ic_irq_chip;
435 qe_ic->virq_high = platform_get_irq(pdev, 0);
436 qe_ic->virq_low = platform_get_irq(pdev, 1);
438 if (qe_ic->virq_low <= 0)
441 if (qe_ic->virq_high > 0 && qe_ic->virq_high != qe_ic->virq_low) {
449 qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
450 &qe_ic_host_ops, qe_ic);
451 if (qe_ic->irqhost == NULL) {
456 qe_ic_write(qe_ic->regs, QEIC_CICR, 0);
458 irq_set_handler_data(qe_ic->virq_low, qe_ic);
459 irq_set_chained_handler(qe_ic->virq_low, low_handler);
462 irq_set_handler_data(qe_ic->virq_high, qe_ic);
463 irq_set_chained_handler(qe_ic->virq_high, high_handler);