Lines Matching refs:uint32_t
199 static inline uint32_t set_rmask(uint32_t val)
205 static inline uint32_t clr_rmask(uint32_t val)
277 uint32_t Asuint32_t;
311 uint32_t block_size;
312 uint32_t alt_block_size;
313 uint32_t flash_size;
314 uint32_t wrt_enable_data;
355 uint32_t code;
356 uint32_t size;
357 uint32_t start;
358 uint32_t end;
584 uint32_t rqq_addr_lo; /* 18-1B */
585 uint32_t rqq_addr_hi; /* 1C-1F */
586 uint32_t compq_addr_lo; /* 20-23 */
587 uint32_t compq_addr_hi; /* 24-27 */
588 uint32_t shdwreg_addr_lo; /* 28-2B */
589 uint32_t shdwreg_addr_hi; /* 2C-2F */
644 uint32_t res5; /* 4C-4F */
673 uint32_t cookie; /* 200-203 */
712 uint32_t ipv6_nd_reach_time; /* 250-253 */
713 uint32_t ipv6_nd_rexmit_timer; /* 254-257 */
714 uint32_t ipv6_nd_stale_timeout; /* 258-25B */
718 uint32_t ipv6_gw_advrt_mtu; /* 270-273 */
777 uint32_t cookie; /* 200-203 */
795 uint32_t ipv6_nd_reach_time; /* 250-253 */
796 uint32_t ipv6_nd_rexmit_timer; /* 254-257 */
797 uint32_t ipv6_nd_stale_timeout; /* 258-25B */
801 uint32_t ipv6_gw_advrt_mtu; /* 270-273 */
873 uint32_t res1; /* 10-13 */
909 uint32_t stat_sn; /* 1C8-1CB */
910 uint32_t exp_stat_sn; /* 1CC-1CF */
941 uint32_t cookie; /* 00-03 */
942 uint32_t physAddrCount; /* 04-07 */
946 uint32_t serialNumber; /* 128-12B */
949 uint32_t pciDeviceVendor; /* 12C-12F */
950 uint32_t pciDeviceId; /* 130-133 */
951 uint32_t pciSubsysVendor; /* 134-137 */
952 uint32_t pciSubsysId; /* 138-13B */
955 uint32_t crumbs; /* 13C-13F */
957 uint32_t enterpriseNumber; /* 140-143 */
959 uint32_t mtu; /* 144-147 */
960 uint32_t reserved0; /* 148-14b */
961 uint32_t crumbs2; /* 14c-14f */
963 uint32_t crumbs3; /* 160-16f */
968 uint32_t reserved1[39]; /* 170-1ff */
979 uint32_t iscsi_pci_func_cnt; /* 1c-1f number of iSCSI PCI functions */
980 uint32_t pci_func; /* 20-23 this PCI function */
1019 uint32_t time_of_crash_in_secs; /* 48 - 4B */
1020 uint32_t time_of_crash_in_ms; /* 4C - 4F */
1036 uint32_t timestamp_sec; /* 00 - 03 seconds since boot */
1037 uint32_t timestamp_ms; /* 04 - 07 milliseconds since boot */
1080 uint32_t signature;
1093 uint32_t addrLow;
1094 uint32_t addrHigh;
1098 uint32_t count;
1107 uint32_t handle; /* 04-07 */
1133 uint32_t cmdSeqNum; /* 28-2B */
1136 uint32_t ttlByteCnt; /* 30-33 */
1161 uint32_t system_defined; /* 04-07 */
1181 uint32_t handle; /* 04-07 */
1210 uint32_t residualByteCnt; /* 10-13 */
1211 uint32_t bidiResidualByteCnt; /* 14-17 */
1212 uint32_t expSeqNum; /* 18-1B */
1213 uint32_t maxCmdSeqNum; /* 1C-1F */
1226 uint32_t handle; /* 04-07 */
1242 uint32_t res1; /* 1C-1F */
1249 uint32_t handle; /* 04-07 */
1261 uint32_t outResidual; /* 1C-1F */
1263 uint32_t inResidual; /* 2C-2F */
1269 uint32_t handle; /* 04-07 */
1270 uint32_t in_mbox[8]; /* 08-25 */
1271 uint32_t res1[6]; /* 26-3F */
1276 uint32_t handle; /* 04-07 */
1277 uint32_t out_mbox[8]; /* 08-25 */
1278 uint32_t res1[6]; /* 26-3F */
1286 uint32_t signature;
1373 uint32_t tx_cmd_pdu; /* 0290-0293 */
1374 uint32_t tx_resp_pdu; /* 0294-0297 */
1375 uint32_t rx_cmd_pdu; /* 0298-029B */
1376 uint32_t rx_resp_pdu; /* 029C-029F */
1381 uint32_t hdr_digest_err; /* 02B0���02B3 */
1382 uint32_t data_digest_err; /* 02B4���02B7 */
1383 uint32_t conn_timeout_err; /* 02B8���02BB */
1384 uint32_t framing_err; /* 02BC���02BF */
1386 uint32_t tx_nopout_pdus; /* 02C0���02C3 */
1387 uint32_t tx_scsi_cmd_pdus; /* 02C4���02C7 */
1388 uint32_t tx_tmf_cmd_pdus; /* 02C8���02CB */
1389 uint32_t tx_login_cmd_pdus; /* 02CC���02CF */
1390 uint32_t tx_text_cmd_pdus; /* 02D0���02D3 */
1391 uint32_t tx_scsi_write_pdus; /* 02D4���02D7 */
1392 uint32_t tx_logout_cmd_pdus; /* 02D8���02DB */
1393 uint32_t tx_snack_req_pdus; /* 02DC���02DF */
1395 uint32_t rx_nopin_pdus; /* 02E0���02E3 */
1396 uint32_t rx_scsi_resp_pdus; /* 02E4���02E7 */
1397 uint32_t rx_tmf_resp_pdus; /* 02E8���02EB */
1398 uint32_t rx_login_resp_pdus; /* 02EC���02EF */
1399 uint32_t rx_text_resp_pdus; /* 02F0���02F3 */
1400 uint32_t rx_scsi_read_pdus; /* 02F4���02F7 */
1401 uint32_t rx_logout_resp_pdus; /* 02F8���02FB */
1403 uint32_t rx_r2t_pdus; /* 02FC���02FF */
1404 uint32_t rx_async_pdus; /* 0300���0303 */
1405 uint32_t rx_reject_pdus; /* 0304���0307 */
1421 uint32_t entry_type;
1422 uint32_t first_entry_offset;
1423 uint32_t size_of_template;
1424 uint32_t capture_debug_level;
1425 uint32_t num_of_entries;
1426 uint32_t version;
1427 uint32_t driver_timestamp;
1428 uint32_t checksum;
1430 uint32_t driver_capture_mask;
1431 uint32_t driver_info_word2;
1432 uint32_t driver_info_word3;
1433 uint32_t driver_info_word4;
1435 uint32_t saved_state_array[QLA8XXX_DBG_STATE_ARRAY_LEN];
1436 uint32_t capture_size_array[QLA8XXX_DBG_CAP_SIZE_ARRAY_LEN];
1437 uint32_t ocm_window_reg[QLA83XX_DBG_OCM_WNDREG_ARRAY_LEN];
1438 uint32_t capabilities[QLA80XX_TEMPLATE_RESERVED_BITS];