Lines Matching refs:ctrl_status

1201 	wrt_reg_dword(&reg->ctrl_status,
1202 rd_reg_dword(&reg->ctrl_status) | CSRX_FLASH_ENABLE);
1203 rd_reg_dword(&reg->ctrl_status); /* PCI Posting. */
1244 wrt_reg_dword(&reg->ctrl_status,
1245 rd_reg_dword(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE);
1470 wrt_reg_dword(&reg->ctrl_status,
1471 rd_reg_dword(&reg->ctrl_status) | CSRX_FLASH_ENABLE);
1472 rd_reg_dword(&reg->ctrl_status); /* PCI Posting. */
1494 wrt_reg_dword(&reg->ctrl_status,
1495 rd_reg_dword(&reg->ctrl_status) & ~CSRX_FLASH_ENABLE);
1496 rd_reg_dword(&reg->ctrl_status); /* PCI Posting. */
1974 data = rd_reg_word(&reg->ctrl_status);
1976 wrt_reg_word(&reg->ctrl_status, data);
1977 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
1990 data = rd_reg_word(&reg->ctrl_status);
1992 wrt_reg_word(&reg->ctrl_status, data);
1993 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2012 bank_select = rd_reg_word(&reg->ctrl_status);
2020 wrt_reg_word(&reg->ctrl_status, bank_select);
2021 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2032 wrt_reg_word(&reg->ctrl_status, bank_select);
2033 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2037 wrt_reg_word(&reg->ctrl_status, bank_select);
2038 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2072 bank_select = rd_reg_word(&reg->ctrl_status);
2079 wrt_reg_word(&reg->ctrl_status, bank_select);
2080 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2083 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2085 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2093 wrt_reg_word(&reg->ctrl_status, bank_select);
2094 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2098 wrt_reg_word(&reg->ctrl_status, bank_select);
2099 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2108 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2110 rd_reg_word(&reg->ctrl_status); /* PCI Posting. */
2403 wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);