scsi/qla2xxx/qla_def.h

299 #define LOOPID_MAP_SIZE		(ha->max_fibre_devices)
336 #define NPH_SNS_LID(ha)	(IS_FWI2_CAPABLE(ha) ? NPH_SNS : SIMPLE_NAME_SERVER)
1050 #define ISP_REQ_Q_IN(ha, reg) \
1051 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1054 #define ISP_REQ_Q_OUT(ha, reg) \
1055 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1058 #define ISP_RSP_Q_IN(ha, reg) \
1059 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1062 #define ISP_RSP_Q_OUT(ha, reg) \
1063 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1070 #define MAILBOX_REG(ha, reg, num) \
1071 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1076 #define RD_MAILBOX_REG(ha, reg, num) \
1077 	rd_reg_word(MAILBOX_REG(ha, reg, num))
1078 #define WRT_MAILBOX_REG(ha, reg, num, data) \
1079 	wrt_reg_word(MAILBOX_REG(ha, reg, num), data)
1081 #define FB_CMD_REG(ha, reg) \
1082 	(IS_QLA2100(ha) || IS_QLA2200(ha) ? \
1085 #define RD_FB_CMD_REG(ha, reg) \
1086 	rd_reg_word(FB_CMD_REG(ha, reg))
1087 #define WRT_FB_CMD_REG(ha, reg, data) \
1088 	wrt_reg_word(FB_CMD_REG(ha, reg), data)
1990 #define SET_TARGET_ID(ha, to, from)			\
1992 	if (HAS_EXTENDED_IDS(ha))			\
3672 #define ISP_QUE_REG(ha, id) \
3673 	((ha->mqenable || IS_QLA83XX(ha) || \
3674 	  IS_QLA27XX(ha) || IS_QLA28XX(ha)) ? \
3675 	 ((void __iomem *)ha->mqiobase + (QLA_QUE_PAGE * id)) :\
3676 	 ((void __iomem *)ha->iobase))
3812 	 * ha->flags.eeh_busy
3813 	 * ha->flags.pci_channel_io_perm_failure
3843 	struct qla_msix_entry *msix; /* point to &ha->msix_entries[x] */
4048 #define Q_FULL_THRESH_HOLD(ha) \
4049 	((ha->cur_fw_xcb_count/100) * Q_FULL_THRESH_HOLD_PERCENT)
4298 #define DT_MASK(ha)     ((ha)->isp_type & (DT_ISP_LAST - 1))
4299 #define IS_QLA2100(ha)  (DT_MASK(ha) & DT_ISP2100)
4300 #define IS_QLA2200(ha)  (DT_MASK(ha) & DT_ISP2200)
4301 #define IS_QLA2300(ha)  (DT_MASK(ha) & DT_ISP2300)
4302 #define IS_QLA2312(ha)  (DT_MASK(ha) & DT_ISP2312)
4303 #define IS_QLA2322(ha)  (DT_MASK(ha) & DT_ISP2322)
4304 #define IS_QLA6312(ha)  (DT_MASK(ha) & DT_ISP6312)
4305 #define IS_QLA6322(ha)  (DT_MASK(ha) & DT_ISP6322)
4306 #define IS_QLA2422(ha)  (DT_MASK(ha) & DT_ISP2422)
4307 #define IS_QLA2432(ha)  (DT_MASK(ha) & DT_ISP2432)
4308 #define IS_QLA5422(ha)  (DT_MASK(ha) & DT_ISP5422)
4309 #define IS_QLA5432(ha)  (DT_MASK(ha) & DT_ISP5432)
4310 #define IS_QLA2532(ha)  (DT_MASK(ha) & DT_ISP2532)
4311 #define IS_QLA8432(ha)  (DT_MASK(ha) & DT_ISP8432)
4312 #define IS_QLA8001(ha)	(DT_MASK(ha) & DT_ISP8001)
4313 #define IS_QLA81XX(ha)	(IS_QLA8001(ha))
4314 #define IS_QLA82XX(ha)	(DT_MASK(ha) & DT_ISP8021)
4315 #define IS_QLA8044(ha)  (DT_MASK(ha) & DT_ISP8044)
4316 #define IS_QLA2031(ha)	(DT_MASK(ha) & DT_ISP2031)
4317 #define IS_QLA8031(ha)	(DT_MASK(ha) & DT_ISP8031)
4318 #define IS_QLAFX00(ha)	(DT_MASK(ha) & DT_ISPFX00)
4319 #define IS_QLA2071(ha)	(DT_MASK(ha) & DT_ISP2071)
4320 #define IS_QLA2271(ha)	(DT_MASK(ha) & DT_ISP2271)
4321 #define IS_QLA2261(ha)	(DT_MASK(ha) & DT_ISP2261)
4322 #define IS_QLA2081(ha)	(DT_MASK(ha) & DT_ISP2081)
4323 #define IS_QLA2281(ha)	(DT_MASK(ha) & DT_ISP2281)
4325 #define IS_QLA23XX(ha)  (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \
4326 			IS_QLA6312(ha) || IS_QLA6322(ha))
4327 #define IS_QLA24XX(ha)  (IS_QLA2422(ha) || IS_QLA2432(ha))
4328 #define IS_QLA54XX(ha)  (IS_QLA5422(ha) || IS_QLA5432(ha))
4329 #define IS_QLA25XX(ha)  (IS_QLA2532(ha))
4330 #define IS_QLA83XX(ha)	(IS_QLA2031(ha) || IS_QLA8031(ha))
4331 #define IS_QLA84XX(ha)  (IS_QLA8432(ha))
4332 #define IS_QLA27XX(ha)  (IS_QLA2071(ha) || IS_QLA2271(ha) || IS_QLA2261(ha))
4333 #define IS_QLA28XX(ha)	(IS_QLA2081(ha) || IS_QLA2281(ha))
4334 #define IS_QLA24XX_TYPE(ha)     (IS_QLA24XX(ha) || IS_QLA54XX(ha) || \
4335 				IS_QLA84XX(ha))
4336 #define IS_CNA_CAPABLE(ha)	(IS_QLA81XX(ha) || IS_QLA82XX(ha) || \
4337 				IS_QLA8031(ha) || IS_QLA8044(ha))
4338 #define IS_P3P_TYPE(ha)		(IS_QLA82XX(ha) || IS_QLA8044(ha))
4339 #define IS_QLA2XXX_MIDTYPE(ha)	(IS_QLA24XX(ha) || IS_QLA84XX(ha) || \
4340 				IS_QLA25XX(ha) || IS_QLA81XX(ha) || \
4341 				IS_QLA82XX(ha) || IS_QLA83XX(ha) || \
4342 				IS_QLA8044(ha) || IS_QLA27XX(ha) || \
4343 				IS_QLA28XX(ha))
4344 #define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
4345 				IS_QLA27XX(ha) || IS_QLA28XX(ha))
4346 #define IS_NOPOLLING_TYPE(ha)	(IS_QLA81XX(ha) && (ha)->flags.msix_enabled)
4347 #define IS_FAC_REQUIRED(ha)	(IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
4348 				IS_QLA27XX(ha) || IS_QLA28XX(ha))
4349 #define IS_NOCACHE_VPD_TYPE(ha)	(IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
4350 				IS_QLA27XX(ha) || IS_QLA28XX(ha))
4351 #define IS_ALOGIO_CAPABLE(ha)	(IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha))
4353 #define IS_T10_PI_CAPABLE(ha)   ((ha)->device_type & DT_T10_PI)
4354 #define IS_IIDMA_CAPABLE(ha)    ((ha)->device_type & DT_IIDMA)
4355 #define IS_FWI2_CAPABLE(ha)     ((ha)->device_type & DT_FWI2)
4356 #define IS_ZIO_SUPPORTED(ha)    ((ha)->device_type & DT_ZIO_SUPPORTED)
4357 #define IS_OEM_001(ha)          ((ha)->device_type & DT_OEM_001)
4358 #define HAS_EXTENDED_IDS(ha)    ((ha)->device_type & DT_EXTENDED_IDS)
4359 #define IS_CT6_SUPPORTED(ha)	((ha)->device_type & DT_CT6_SUPPORTED)
4360 #define IS_MQUE_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4361 				 IS_QLA28XX(ha))
4362 #define IS_BIDI_CAPABLE(ha) \
4363     (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4365 #define IS_MCTP_CAPABLE(ha)	(IS_QLA2031(ha) && \
4366 				((ha)->fw_attributes_ext[0] & BIT_0))
4378 #define IS_PI_UNINIT_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4379 					 IS_QLA28XX(ha))
4380 #define IS_PI_IPGUARD_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4381 					 IS_QLA28XX(ha))
4382 #define IS_PI_DIFB_DIX0_CAPABLE(ha)	(0)
4383 #define IS_PI_SPLIT_DET_CAPABLE_HBA(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4384 					IS_QLA28XX(ha))
4385 #define IS_PI_SPLIT_DET_CAPABLE(ha)	(IS_PI_SPLIT_DET_CAPABLE_HBA(ha) && \
4386     (((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
4387 #define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4388 				IS_QLA28XX(ha))
4389 #define IS_TGT_MODE_CAPABLE(ha)	(ha->tgt.atio_q_length)
4390 #define IS_SHADOW_REG_CAPABLE(ha)  (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4391 #define IS_DPORT_CAPABLE(ha)  (IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4392 				IS_QLA28XX(ha))
4393 #define IS_FAWWN_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || \
4394 				IS_QLA28XX(ha))
4395 #define IS_EXCHG_OFFLD_CAPABLE(ha) \
4396 	(IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4397 #define IS_EXLOGIN_OFFLD_CAPABLE(ha) \
4398 	(IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
4399 	 IS_QLA27XX(ha) || IS_QLA28XX(ha))
4400 #define USE_ASYNC_SCAN(ha) (IS_QLA25XX(ha) || IS_QLA81XX(ha) ||\
4401 	IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4403 #define IS_ZIO_THRESHOLD_CAPABLE(ha) \
4404 	((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&\
4405 	 (ha->zio_mode == QLA_ZIO_MODE_6))
4861 #define FW_ABILITY_MAX_SPEED(ha)	\
4862 	(ha->fw_ability_mask & FW_ABILITY_MAX_SPEED_MASK)
5208 #define LOOP_TRANSITION(ha) \
5209 	(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
5210 	 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \
5211 	 atomic_read(&ha->loop_state) == LOOP_DOWN)
5213 #define STATE_TRANSITION(ha) \
5214 		(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \
5215 			 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
5438 #define IS_BPM_CAPABLE(ha) \
5439 	(IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || \
5440 	 IS_QLA27XX(ha) || IS_QLA28XX(ha))
5441 #define IS_BPM_RANGE_CAPABLE(ha) \
5442 	(IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5456 #define N2N_TOPO(ha) \
5457 	((ha->prev_topology == ISP_CFG_N && !ha->current_topology) || \
5458 	 ha->current_topology == ISP_CFG_N || \
5459 	 !ha->current_topology)
5475 #define NVME_PRIORITY(ha, fcport) \
5477 	 (ha->fc4_type_priority == FC4_PRIORITY_NVME))
5479 #define NVME_TARGET(ha, fcport) \