scsi/pm8001/pm80xx_hwi.c

143 	accum_len = pm8001_mr32(fatal_table_address,
291 			pm8001_mr32(fatal_table_address,
295 		if (pm8001_mr32(fatal_table_address,
314 				reg_val = pm8001_mr32(fatal_table_address,
337 				reg_val = pm8001_mr32(fatal_table_address,
361 		length_to_read = pm8001_mr32(fatal_table_address,
447 	total_len = pm8001_mr32(nonfatal_table_address,
475 		reg_val = pm8001_mr32(nonfatal_table_address,
495 	accum_len = pm8001_mr32(nonfatal_table_address,
522 		pm8001_mr32(address, MAIN_SIGNATURE_OFFSET);
524 		pm8001_mr32(address, MAIN_INTERFACE_REVISION);
526 		pm8001_mr32(address, MAIN_FW_REVISION);
528 		pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET);
530 		pm8001_mr32(address, MAIN_MAX_SGL_OFFSET);
532 		pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET);
534 		pm8001_mr32(address, MAIN_GST_OFFSET);
536 		pm8001_mr32(address, MAIN_IBQ_OFFSET);
538 		pm8001_mr32(address, MAIN_OBQ_OFFSET);
542 		pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET);
544 		pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH);
546 		pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET);
548 		pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH);
552 		pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET);
556 		pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET);
559 		pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET);
561 		pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET);
564 		pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER);
567 		pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE);
569 		pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION);
599 			pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET);
601 			pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET);
603 			pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET);
605 			pm8001_mr32(address, GST_MSGUTCNT_OFFSET);
607 			pm8001_mr32(address, GST_IOPTCNT_OFFSET);
609 			pm8001_mr32(address, GST_GPIO_INPUT_VAL);
611 			pm8001_mr32(address, GST_RERRINFO_OFFSET0);
613 			pm8001_mr32(address, GST_RERRINFO_OFFSET1);
615 			pm8001_mr32(address, GST_RERRINFO_OFFSET2);
617 			pm8001_mr32(address, GST_RERRINFO_OFFSET3);
619 			pm8001_mr32(address, GST_RERRINFO_OFFSET4);
621 			pm8001_mr32(address, GST_RERRINFO_OFFSET5);
623 			pm8001_mr32(address, GST_RERRINFO_OFFSET6);
625 			 pm8001_mr32(address, GST_RERRINFO_OFFSET7);
635 			pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET);
637 			pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET);
639 			pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET);
641 			pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET);
643 			pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET);
645 			pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET);
647 			pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET);
649 			pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET);
651 			pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET);
653 			pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET);
655 			pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET);
657 			pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET);
659 			pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET);
661 			pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET);
663 			pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET);
665 			pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET);
668 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET);
670 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET);
672 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET);
674 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET);
676 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET);
678 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET);
680 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET);
682 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET);
684 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET);
686 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET);
688 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET);
690 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET);
692 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET);
694 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET);
696 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET);
698 			pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET);
713 			get_pci_bar_index(pm8001_mr32(address,
716 			pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET));
731 			get_pci_bar_index(pm8001_mr32(address,
734 			pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET));
796 			get_pci_bar_index(pm8001_mr32(addressib,
799 			pm8001_mr32(addressib, (offsetib + 0x18));
830 			get_pci_bar_index(pm8001_mr32(addressob,
833 			pm8001_mr32(addressob, (offsetob + 0x18));
876 		   pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT));
889 		   pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET));
1022 			pm8001_mr32(pm8001_ha->general_stat_tbl_addr,
1138 	value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0);
1538 			pm8001_mr32(pm8001_ha->general_stat_tbl_addr,