Lines Matching refs:opc

1198 	u32 opc = OPC_INB_SET_CONTROLLER_CONFIG;
1223 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
1243 u32 opc = OPC_INB_SET_CONTROLLER_CONFIG;
1293 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
1401 u32 opc = OPC_INB_KEK_MANAGEMENT;
1420 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
3076 u32 opc = OPC_INB_SAS_HW_EVENT_ACK;
3085 pm8001_mpi_build_cmd(pm8001_ha, Qnum, opc, &payload,
3794 u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF);
3796 switch (opc) {
3917 "OPC_OUB_PHY_START_RESP opcode:%x\n", opc);
3922 "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc);
3927 "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc);
3932 "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc);
3937 "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc);
3942 "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc);
3947 "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc);
3952 "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc);
3957 "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc);
3962 "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc);
3967 "Unknown outbound Queue IOMB OPC = 0x%x\n", opc);
4117 u32 opc;
4145 opc = OPC_INB_SMP_REQUEST;
4213 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &smp_cmd,
4287 u32 opc = OPC_INB_SSPINIIOSTART;
4312 opc = OPC_INB_SSP_INI_DIF_ENC_IO;
4422 return pm8001_mpi_build_cmd(pm8001_ha, q_index, opc, &ssp_cmd,
4440 u32 opc = OPC_INB_SATA_HOST_OPSTART;
4482 opc = OPC_INB_SATA_DIF_ENC_IO;
4618 ccb->ccb_tag, opc,
4621 return pm8001_mpi_build_cmd(pm8001_ha, q_index, opc, &sata_cmd,
4690 u32 opc;
4723 opc = OPC_INB_REG_DEV;
4744 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4764 u32 opc = OPC_INB_LOCAL_PHY_CONTROL;
4775 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4820 u32 opc = OPC_INB_SET_PHY_PROFILE;
4839 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4861 u32 tag, opc;
4873 opc = OPC_INB_SET_PHY_PROFILE;
4883 rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,