Lines Matching refs:pm8001_mr32
55 pm8001_mr32(address, 0x00);
57 pm8001_mr32(address, 0x04);
59 pm8001_mr32(address, 0x08);
61 pm8001_mr32(address, 0x0C);
63 pm8001_mr32(address, 0x10);
65 pm8001_mr32(address, 0x14);
67 pm8001_mr32(address, 0x18);
69 pm8001_mr32(address, MAIN_IBQ_OFFSET);
71 pm8001_mr32(address, MAIN_OBQ_OFFSET);
73 pm8001_mr32(address, MAIN_HDA_FLAGS_OFFSET);
77 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET);
81 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET);
83 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH);
85 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET);
87 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH);
98 pm8001_mr32(address, 0x00);
100 pm8001_mr32(address, 0x04);
102 pm8001_mr32(address, 0x08);
104 pm8001_mr32(address, 0x0C);
106 pm8001_mr32(address, 0x10);
108 pm8001_mr32(address, 0x14);
110 pm8001_mr32(address, 0x18);
112 pm8001_mr32(address, 0x1C);
114 pm8001_mr32(address, 0x20);
116 pm8001_mr32(address, 0x24);
118 pm8001_mr32(address, 0x28);
120 pm8001_mr32(address, 0x2C);
122 pm8001_mr32(address, 0x30);
124 pm8001_mr32(address, 0x34);
126 pm8001_mr32(address, 0x38);
128 pm8001_mr32(address, 0x3C);
130 pm8001_mr32(address, 0x40);
132 pm8001_mr32(address, 0x44);
134 pm8001_mr32(address, 0x48);
136 pm8001_mr32(address, 0x4C);
138 pm8001_mr32(address, 0x50);
140 pm8001_mr32(address, 0x54);
142 pm8001_mr32(address, 0x58);
144 pm8001_mr32(address, 0x5C);
146 pm8001_mr32(address, 0x60);
160 get_pci_bar_index(pm8001_mr32(address, (offset + 0x14)));
162 pm8001_mr32(address, (offset + 0x18));
177 get_pci_bar_index(pm8001_mr32(address, (offset + 0x14)));
179 pm8001_mr32(address, (offset + 0x18));
247 get_pci_bar_index(pm8001_mr32(addressib,
250 pm8001_mr32(addressib, (offsetib + 0x18));
276 get_pci_bar_index(pm8001_mr32(addressob,
279 pm8001_mr32(addressob, (offsetob + 0x18));
553 pm8001_mr32(pm8001_ha->general_stat_tbl_addr,
746 pm8001_mr32(pm8001_ha->general_stat_tbl_addr,