Lines Matching defs:cs
104 static void myrs_qcmd(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk)
106 void __iomem *base = cs->io_base;
108 union myrs_cmd_mbox *next_mbox = cs->next_cmd_mbox;
110 cs->write_cmd_mbox(next_mbox, mbox);
112 if (cs->prev_cmd_mbox1->words[0] == 0 ||
113 cs->prev_cmd_mbox2->words[0] == 0)
114 cs->get_cmd_mbox(base);
116 cs->prev_cmd_mbox2 = cs->prev_cmd_mbox1;
117 cs->prev_cmd_mbox1 = next_mbox;
119 if (++next_mbox > cs->last_cmd_mbox)
120 next_mbox = cs->first_cmd_mbox;
122 cs->next_cmd_mbox = next_mbox;
128 static void myrs_exec_cmd(struct myrs_hba *cs,
135 spin_lock_irqsave(&cs->queue_lock, flags);
136 myrs_qcmd(cs, cmd_blk);
137 spin_unlock_irqrestore(&cs->queue_lock, flags);
145 static void myrs_report_progress(struct myrs_hba *cs, unsigned short ldev_num,
149 shost_printk(KERN_INFO, cs->host,
158 static unsigned char myrs_get_ctlr_info(struct myrs_hba *cs)
160 struct myrs_cmdblk *cmd_blk = &cs->dcmd_blk;
167 ldev_present = cs->ctlr_info->ldev_present;
168 ldev_critical = cs->ctlr_info->ldev_critical;
169 ldev_offline = cs->ctlr_info->ldev_offline;
171 ctlr_info_addr = dma_map_single(&cs->pdev->dev, cs->ctlr_info,
174 if (dma_mapping_error(&cs->pdev->dev, ctlr_info_addr))
177 mutex_lock(&cs->dcmd_mutex);
189 dev_dbg(&cs->host->shost_gendev, "Sending GetControllerInfo\n");
190 myrs_exec_cmd(cs, cmd_blk);
192 mutex_unlock(&cs->dcmd_mutex);
193 dma_unmap_single(&cs->pdev->dev, ctlr_info_addr,
196 if (cs->ctlr_info->bg_init_active +
197 cs->ctlr_info->ldev_init_active +
198 cs->ctlr_info->pdev_init_active +
199 cs->ctlr_info->cc_active +
200 cs->ctlr_info->rbld_active +
201 cs->ctlr_info->exp_active != 0)
202 cs->needs_update = true;
203 if (cs->ctlr_info->ldev_present != ldev_present ||
204 cs->ctlr_info->ldev_critical != ldev_critical ||
205 cs->ctlr_info->ldev_offline != ldev_offline)
206 shost_printk(KERN_INFO, cs->host,
208 cs->ctlr_info->ldev_critical,
209 cs->ctlr_info->ldev_offline,
210 cs->ctlr_info->ldev_present);
219 static unsigned char myrs_get_ldev_info(struct myrs_hba *cs,
222 struct myrs_cmdblk *cmd_blk = &cs->dcmd_blk;
230 ldev_info_addr = dma_map_single(&cs->pdev->dev, ldev_info,
233 if (dma_mapping_error(&cs->pdev->dev, ldev_info_addr))
236 mutex_lock(&cs->dcmd_mutex);
248 dev_dbg(&cs->host->shost_gendev,
250 myrs_exec_cmd(cs, cmd_blk);
252 mutex_unlock(&cs->dcmd_mutex);
253 dma_unmap_single(&cs->pdev->dev, ldev_info_addr,
265 shost_printk(KERN_INFO, cs->host,
272 shost_printk(KERN_INFO, cs->host,
278 myrs_report_progress(cs, ldev_num,
282 myrs_report_progress(cs, ldev_num,
286 myrs_report_progress(cs, ldev_num,
290 myrs_report_progress(cs, ldev_num,
294 shost_printk(KERN_INFO, cs->host,
306 static unsigned char myrs_get_pdev_info(struct myrs_hba *cs,
310 struct myrs_cmdblk *cmd_blk = &cs->dcmd_blk;
316 pdev_info_addr = dma_map_single(&cs->pdev->dev, pdev_info,
319 if (dma_mapping_error(&cs->pdev->dev, pdev_info_addr))
322 mutex_lock(&cs->dcmd_mutex);
336 dev_dbg(&cs->host->shost_gendev,
339 myrs_exec_cmd(cs, cmd_blk);
341 mutex_unlock(&cs->dcmd_mutex);
342 dma_unmap_single(&cs->pdev->dev, pdev_info_addr,
350 static unsigned char myrs_dev_op(struct myrs_hba *cs,
353 struct myrs_cmdblk *cmd_blk = &cs->dcmd_blk;
357 mutex_lock(&cs->dcmd_mutex);
365 myrs_exec_cmd(cs, cmd_blk);
367 mutex_unlock(&cs->dcmd_mutex);
375 static unsigned char myrs_translate_pdev(struct myrs_hba *cs,
379 struct pci_dev *pdev = cs->pdev;
393 mutex_lock(&cs->dcmd_mutex);
394 cmd_blk = &cs->dcmd_blk;
408 myrs_exec_cmd(cs, cmd_blk);
410 mutex_unlock(&cs->dcmd_mutex);
419 static unsigned char myrs_get_event(struct myrs_hba *cs,
422 struct pci_dev *pdev = cs->pdev;
424 struct myrs_cmdblk *cmd_blk = &cs->mcmd_blk;
443 myrs_exec_cmd(cs, cmd_blk);
454 static unsigned char myrs_get_fwstatus(struct myrs_hba *cs)
456 struct myrs_cmdblk *cmd_blk = &cs->mcmd_blk;
469 sgl->sge[0].sge_addr = cs->fwstat_addr;
471 dev_dbg(&cs->host->shost_gendev, "Sending GetHealthStatus\n");
472 myrs_exec_cmd(cs, cmd_blk);
481 static bool myrs_enable_mmio_mbox(struct myrs_hba *cs,
484 void __iomem *base = cs->io_base;
485 struct pci_dev *pdev = cs->pdev;
505 cs->cmd_mbox_size = MYRS_MAX_CMD_MBOX * sizeof(union myrs_cmd_mbox);
506 cmd_mbox = dma_alloc_coherent(&pdev->dev, cs->cmd_mbox_size,
507 &cs->cmd_mbox_addr, GFP_KERNEL);
508 if (dma_mapping_error(&pdev->dev, cs->cmd_mbox_addr)) {
512 cs->first_cmd_mbox = cmd_mbox;
514 cs->last_cmd_mbox = cmd_mbox;
515 cs->next_cmd_mbox = cs->first_cmd_mbox;
516 cs->prev_cmd_mbox1 = cs->last_cmd_mbox;
517 cs->prev_cmd_mbox2 = cs->last_cmd_mbox - 1;
520 cs->stat_mbox_size = MYRS_MAX_STAT_MBOX * sizeof(struct myrs_stat_mbox);
521 stat_mbox = dma_alloc_coherent(&pdev->dev, cs->stat_mbox_size,
522 &cs->stat_mbox_addr, GFP_KERNEL);
523 if (dma_mapping_error(&pdev->dev, cs->stat_mbox_addr)) {
528 cs->first_stat_mbox = stat_mbox;
530 cs->last_stat_mbox = stat_mbox;
531 cs->next_stat_mbox = cs->first_stat_mbox;
533 cs->fwstat_buf = dma_alloc_coherent(&pdev->dev,
535 &cs->fwstat_addr, GFP_KERNEL);
536 if (dma_mapping_error(&pdev->dev, cs->fwstat_addr)) {
538 cs->fwstat_buf = NULL;
541 cs->ctlr_info = kzalloc(sizeof(struct myrs_ctlr_info), GFP_KERNEL);
542 if (!cs->ctlr_info)
545 cs->event_buf = kzalloc(sizeof(struct myrs_event), GFP_KERNEL);
546 if (!cs->event_buf)
563 mbox->set_mbox.fwstat_buf_addr = cs->fwstat_addr;
564 mbox->set_mbox.first_cmd_mbox_addr = cs->cmd_mbox_addr;
565 mbox->set_mbox.first_stat_mbox_addr = cs->stat_mbox_addr;
580 static int myrs_get_config(struct myrs_hba *cs)
582 struct myrs_ctlr_info *info = cs->ctlr_info;
583 struct Scsi_Host *shost = cs->host;
590 mutex_lock(&cs->cinfo_mutex);
591 status = myrs_get_ctlr_info(cs);
592 mutex_unlock(&cs->cinfo_mutex);
608 strcpy(cs->model_name, "DAC960 ");
609 strcat(cs->model_name, model);
811 static void myrs_log_event(struct myrs_hba *cs, struct myrs_event *ev)
816 struct Scsi_Host *shost = cs->host;
856 sdev->channel < cs->ctlr_info->physchan_present) {
883 cs->needs_update = true;
889 cs->needs_update = true;
913 if (cs->disable_enc_msg)
938 struct myrs_hba *cs = shost_priv(sdev->host);
944 if (sdev->channel >= cs->ctlr_info->physchan_present) {
973 struct myrs_hba *cs = shost_priv(sdev->host);
990 if (sdev->channel < cs->ctlr_info->physchan_present) {
1001 status = myrs_translate_pdev(cs, sdev->channel, sdev->id,
1017 mutex_lock(&cs->dcmd_mutex);
1018 cmd_blk = &cs->dcmd_blk;
1028 myrs_exec_cmd(cs, cmd_blk);
1030 mutex_unlock(&cs->dcmd_mutex);
1032 if (sdev->channel < cs->ctlr_info->physchan_present) {
1057 struct myrs_hba *cs = shost_priv(sdev->host);
1063 if (sdev->channel >= cs->ctlr_info->physchan_present) {
1083 struct myrs_hba *cs = shost_priv(sdev->host);
1088 if (sdev->channel < cs->ctlr_info->physchan_present)
1093 status = myrs_get_ldev_info(cs, ldev_num, ldev_info);
1112 struct myrs_hba *cs = shost_priv(sdev->host);
1120 if (sdev->channel < cs->ctlr_info->physchan_present)
1132 status = myrs_get_ldev_info(cs, ldev_num, ldev_info);
1151 mutex_lock(&cs->dcmd_mutex);
1152 cmd_blk = &cs->dcmd_blk;
1166 myrs_exec_cmd(cs, cmd_blk);
1168 mutex_unlock(&cs->dcmd_mutex);
1188 struct myrs_hba *cs = shost_priv(sdev->host);
1192 if (sdev->channel < cs->ctlr_info->physchan_present)
1199 myrs_get_ldev_info(cs, ldev_num, ldev_info);
1212 struct myrs_hba *cs = shost_priv(sdev->host);
1220 if (sdev->channel < cs->ctlr_info->physchan_present)
1232 status = myrs_get_ldev_info(cs, ldev_num, ldev_info);
1252 mutex_lock(&cs->dcmd_mutex);
1253 cmd_blk = &cs->dcmd_blk;
1269 myrs_exec_cmd(cs, cmd_blk);
1271 mutex_unlock(&cs->dcmd_mutex);
1301 struct myrs_hba *cs = shost_priv(shost);
1304 memcpy(serial, cs->ctlr_info->serial_number, 16);
1314 struct myrs_hba *cs = shost_priv(shost);
1316 return snprintf(buf, 20, "%d\n", cs->host->host_no);
1337 struct myrs_hba *cs = shost_priv(shost);
1341 struct myrs_ctlr_info *info = cs->ctlr_info;
1389 struct myrs_hba *cs = shost_priv(shost);
1391 return snprintf(buf, 28, "%s\n", cs->model_name);
1399 struct myrs_hba *cs = shost_priv(shost);
1401 return snprintf(buf, 4, "%d\n", cs->ctlr_info->ctlr_type);
1409 struct myrs_hba *cs = shost_priv(shost);
1411 return snprintf(buf, 8, "%d MB\n", cs->ctlr_info->cache_size_mb);
1419 struct myrs_hba *cs = shost_priv(shost);
1422 cs->ctlr_info->fw_major_version,
1423 cs->ctlr_info->fw_minor_version,
1424 cs->ctlr_info->fw_turn_number);
1432 struct myrs_hba *cs = shost_priv(shost);
1437 mutex_lock(&cs->dcmd_mutex);
1438 cmd_blk = &cs->dcmd_blk;
1446 myrs_exec_cmd(cs, cmd_blk);
1448 mutex_unlock(&cs->dcmd_mutex);
1456 cs->next_evseq = 0;
1457 cs->needs_update = true;
1458 queue_delayed_work(cs->work_q, &cs->monitor_work, 1);
1459 flush_delayed_work(&cs->monitor_work);
1470 struct myrs_hba *cs = shost_priv(shost);
1473 status = myrs_dev_op(cs, MYRS_IOCTL_FLUSH_DEVICE_DATA,
1489 struct myrs_hba *cs = shost_priv(shost);
1491 return snprintf(buf, 3, "%d\n", cs->disable_enc_msg);
1498 struct myrs_hba *cs = shost_priv(sdev->host);
1508 cs->disable_enc_msg = value;
1535 struct myrs_hba *cs = shost_priv(shost);
1537 cs->reset(cs->io_base);
1541 static void myrs_mode_sense(struct myrs_hba *cs, struct scsi_cmnd *scmd,
1588 struct myrs_hba *cs = shost_priv(shost);
1610 if (scmd->device->channel >= cs->ctlr_info->physchan_present) {
1618 myrs_mode_sense(cs, scmd, ldev_info);
1628 cmd_blk->sense = dma_pool_alloc(cs->sense_pool, GFP_ATOMIC,
1636 if (scmd->device->channel >= cs->ctlr_info->physchan_present) {
1672 cmd_blk->dcdb = dma_pool_alloc(cs->dcdb_pool, GFP_ATOMIC,
1675 dma_pool_free(cs->sense_pool, cmd_blk->sense,
1682 if (scmd->device->channel >= cs->ctlr_info->physchan_present) {
1729 hw_sgl = dma_pool_alloc(cs->sg_pool, GFP_ATOMIC,
1733 dma_pool_free(cs->dcdb_pool,
1739 dma_pool_free(cs->sense_pool,
1770 spin_lock_irqsave(&cs->queue_lock, flags);
1771 myrs_qcmd(cs, cmd_blk);
1772 spin_unlock_irqrestore(&cs->queue_lock, flags);
1777 static unsigned short myrs_translate_ldev(struct myrs_hba *cs,
1782 sdev->channel - cs->ctlr_info->physchan_present;
1791 struct myrs_hba *cs = shost_priv(sdev->host);
1797 if (sdev->channel >= cs->ctlr_info->physchan_present) {
1804 ldev_num = myrs_translate_ldev(cs, sdev);
1810 status = myrs_get_ldev_info(cs, ldev_num, ldev_info);
1872 status = myrs_get_pdev_info(cs, sdev->channel,
1887 struct myrs_hba *cs = shost_priv(sdev->host);
1893 if (sdev->channel < cs->ctlr_info->physchan_present) {
1937 struct myrs_hba *cs;
1945 cs = shost_priv(shost);
1946 mutex_init(&cs->dcmd_mutex);
1947 mutex_init(&cs->cinfo_mutex);
1948 cs->host = shost;
1950 return cs;
1965 struct myrs_hba *cs = shost_priv(sdev->host);
1967 return (sdev->channel >= cs->ctlr_info->physchan_present) ? 1 : 0;
1978 struct myrs_hba *cs = shost_priv(sdev->host);
1982 if (sdev->channel < cs->ctlr_info->physchan_present || !ldev_info)
1987 myrs_get_ldev_info(cs, ldev_num, ldev_info);
2002 struct myrs_hba *cs = shost_priv(sdev->host);
2006 if (sdev->channel < cs->ctlr_info->physchan_present || !ldev_info)
2041 static void myrs_flush_cache(struct myrs_hba *cs)
2043 myrs_dev_op(cs, MYRS_IOCTL_FLUSH_DEVICE_DATA, MYRS_RAID_CONTROLLER);
2046 static void myrs_handle_scsi(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk,
2064 dma_pool_free(cs->sense_pool, cmd_blk->sense,
2070 dma_pool_free(cs->dcdb_pool, cmd_blk->dcdb,
2076 dma_pool_free(cs->sg_pool, cmd_blk->sgl,
2091 static void myrs_handle_cmdblk(struct myrs_hba *cs, struct myrs_cmdblk *cmd_blk)
2104 struct myrs_hba *cs = container_of(work, struct myrs_hba,
2106 struct Scsi_Host *shost = cs->host;
2107 struct myrs_ctlr_info *info = cs->ctlr_info;
2108 unsigned int epoch = cs->fwstat_buf->epoch;
2114 status = myrs_get_fwstatus(cs);
2116 if (cs->needs_update) {
2117 cs->needs_update = false;
2118 mutex_lock(&cs->cinfo_mutex);
2119 status = myrs_get_ctlr_info(cs);
2120 mutex_unlock(&cs->cinfo_mutex);
2122 if (cs->fwstat_buf->next_evseq - cs->next_evseq > 0) {
2123 status = myrs_get_event(cs, cs->next_evseq,
2124 cs->event_buf);
2126 myrs_log_event(cs, cs->event_buf);
2127 cs->next_evseq++;
2132 if (time_after(jiffies, cs->secondary_monitor_time
2134 cs->secondary_monitor_time = jiffies;
2154 myrs_get_ldev_info(cs, ldev_num, ldev_info);
2156 cs->needs_update = true;
2158 if (epoch == cs->epoch &&
2159 cs->fwstat_buf->next_evseq == cs->next_evseq &&
2160 (cs->needs_update == false ||
2161 time_before(jiffies, cs->primary_monitor_time
2167 cs->primary_monitor_time = jiffies;
2168 queue_delayed_work(cs->work_q, &cs->monitor_work, interval);
2171 static bool myrs_create_mempools(struct pci_dev *pdev, struct myrs_hba *cs)
2173 struct Scsi_Host *shost = cs->host;
2178 cs->sg_pool = dma_pool_create("myrs_sg", &pdev->dev,
2180 if (cs->sg_pool == NULL) {
2186 cs->sense_pool = dma_pool_create("myrs_sense", &pdev->dev,
2188 if (cs->sense_pool == NULL) {
2189 dma_pool_destroy(cs->sg_pool);
2190 cs->sg_pool = NULL;
2196 cs->dcdb_pool = dma_pool_create("myrs_dcdb", &pdev->dev,
2199 if (!cs->dcdb_pool) {
2200 dma_pool_destroy(cs->sg_pool);
2201 cs->sg_pool = NULL;
2202 dma_pool_destroy(cs->sense_pool);
2203 cs->sense_pool = NULL;
2209 snprintf(cs->work_q_name, sizeof(cs->work_q_name),
2211 cs->work_q = create_singlethread_workqueue(cs->work_q_name);
2212 if (!cs->work_q) {
2213 dma_pool_destroy(cs->dcdb_pool);
2214 cs->dcdb_pool = NULL;
2215 dma_pool_destroy(cs->sg_pool);
2216 cs->sg_pool = NULL;
2217 dma_pool_destroy(cs->sense_pool);
2218 cs->sense_pool = NULL;
2225 INIT_DELAYED_WORK(&cs->monitor_work, myrs_monitor);
2226 queue_delayed_work(cs->work_q, &cs->monitor_work, 1);
2231 static void myrs_destroy_mempools(struct myrs_hba *cs)
2233 cancel_delayed_work_sync(&cs->monitor_work);
2234 destroy_workqueue(cs->work_q);
2236 dma_pool_destroy(cs->sg_pool);
2237 dma_pool_destroy(cs->dcdb_pool);
2238 dma_pool_destroy(cs->sense_pool);
2241 static void myrs_unmap(struct myrs_hba *cs)
2243 kfree(cs->event_buf);
2244 kfree(cs->ctlr_info);
2245 if (cs->fwstat_buf) {
2246 dma_free_coherent(&cs->pdev->dev, sizeof(struct myrs_fwstat),
2247 cs->fwstat_buf, cs->fwstat_addr);
2248 cs->fwstat_buf = NULL;
2250 if (cs->first_stat_mbox) {
2251 dma_free_coherent(&cs->pdev->dev, cs->stat_mbox_size,
2252 cs->first_stat_mbox, cs->stat_mbox_addr);
2253 cs->first_stat_mbox = NULL;
2255 if (cs->first_cmd_mbox) {
2256 dma_free_coherent(&cs->pdev->dev, cs->cmd_mbox_size,
2257 cs->first_cmd_mbox, cs->cmd_mbox_addr);
2258 cs->first_cmd_mbox = NULL;
2262 static void myrs_cleanup(struct myrs_hba *cs)
2264 struct pci_dev *pdev = cs->pdev;
2267 myrs_unmap(cs);
2269 if (cs->mmio_base) {
2270 if (cs->disable_intr)
2271 cs->disable_intr(cs);
2272 iounmap(cs->mmio_base);
2273 cs->mmio_base = NULL;
2275 if (cs->irq)
2276 free_irq(cs->irq, cs);
2277 if (cs->io_addr)
2278 release_region(cs->io_addr, 0x80);
2281 scsi_host_put(cs->host);
2291 struct myrs_hba *cs = NULL;
2293 cs = myrs_alloc_host(pdev, entry);
2294 if (!cs) {
2298 cs->pdev = pdev;
2303 cs->pci_addr = pci_resource_start(pdev, 0);
2305 pci_set_drvdata(pdev, cs);
2306 spin_lock_init(&cs->queue_lock);
2310 cs->mmio_base = ioremap(cs->pci_addr & PAGE_MASK, mmio_size);
2311 if (cs->mmio_base == NULL) {
2317 cs->io_base = cs->mmio_base + (cs->pci_addr & ~PAGE_MASK);
2318 if (privdata->hw_init(pdev, cs, cs->io_base))
2322 if (request_irq(pdev->irq, irq_handler, IRQF_SHARED, "myrs", cs) < 0) {
2327 cs->irq = pdev->irq;
2328 return cs;
2333 myrs_cleanup(cs);
2343 static bool myrs_err_status(struct myrs_hba *cs, unsigned char status,
2346 struct pci_dev *pdev = cs->pdev;
2537 struct myrs_hba *cs, void __iomem *base)
2549 myrs_err_status(cs, status, parm0, parm1))
2559 if (!myrs_enable_mmio_mbox(cs, DAC960_GEM_mbox_init)) {
2566 cs->write_cmd_mbox = DAC960_GEM_write_cmd_mbox;
2567 cs->get_cmd_mbox = DAC960_GEM_mem_mbox_new_cmd;
2568 cs->disable_intr = DAC960_GEM_disable_intr;
2569 cs->reset = DAC960_GEM_reset_ctrl;
2575 struct myrs_hba *cs = arg;
2576 void __iomem *base = cs->io_base;
2580 spin_lock_irqsave(&cs->queue_lock, flags);
2582 next_stat_mbox = cs->next_stat_mbox;
2589 cmd_blk = &cs->dcmd_blk;
2591 cmd_blk = &cs->mcmd_blk;
2593 scmd = scsi_host_find_tag(cs->host, id - 3);
2602 dev_err(&cs->pdev->dev,
2606 if (++next_stat_mbox > cs->last_stat_mbox)
2607 next_stat_mbox = cs->first_stat_mbox;
2611 myrs_handle_cmdblk(cs, cmd_blk);
2613 myrs_handle_scsi(cs, cmd_blk, scmd);
2616 cs->next_stat_mbox = next_stat_mbox;
2617 spin_unlock_irqrestore(&cs->queue_lock, flags);
2756 struct myrs_hba *cs, void __iomem *base)
2768 myrs_err_status(cs, status, parm0, parm1))
2778 if (!myrs_enable_mmio_mbox(cs, DAC960_BA_mbox_init)) {
2785 cs->write_cmd_mbox = DAC960_BA_write_cmd_mbox;
2786 cs->get_cmd_mbox = DAC960_BA_mem_mbox_new_cmd;
2787 cs->disable_intr = DAC960_BA_disable_intr;
2788 cs->reset = DAC960_BA_reset_ctrl;
2794 struct myrs_hba *cs = arg;
2795 void __iomem *base = cs->io_base;
2799 spin_lock_irqsave(&cs->queue_lock, flags);
2801 next_stat_mbox = cs->next_stat_mbox;
2808 cmd_blk = &cs->dcmd_blk;
2810 cmd_blk = &cs->mcmd_blk;
2812 scmd = scsi_host_find_tag(cs->host, id - 3);
2821 dev_err(&cs->pdev->dev,
2825 if (++next_stat_mbox > cs->last_stat_mbox)
2826 next_stat_mbox = cs->first_stat_mbox;
2830 myrs_handle_cmdblk(cs, cmd_blk);
2832 myrs_handle_scsi(cs, cmd_blk, scmd);
2835 cs->next_stat_mbox = next_stat_mbox;
2836 spin_unlock_irqrestore(&cs->queue_lock, flags);
2974 struct myrs_hba *cs, void __iomem *base)
2986 myrs_err_status(cs, status, parm0, parm1))
2996 if (!myrs_enable_mmio_mbox(cs, DAC960_LP_mbox_init)) {
3003 cs->write_cmd_mbox = DAC960_LP_write_cmd_mbox;
3004 cs->get_cmd_mbox = DAC960_LP_mem_mbox_new_cmd;
3005 cs->disable_intr = DAC960_LP_disable_intr;
3006 cs->reset = DAC960_LP_reset_ctrl;
3013 struct myrs_hba *cs = arg;
3014 void __iomem *base = cs->io_base;
3018 spin_lock_irqsave(&cs->queue_lock, flags);
3020 next_stat_mbox = cs->next_stat_mbox;
3027 cmd_blk = &cs->dcmd_blk;
3029 cmd_blk = &cs->mcmd_blk;
3031 scmd = scsi_host_find_tag(cs->host, id - 3);
3040 dev_err(&cs->pdev->dev,
3044 if (++next_stat_mbox > cs->last_stat_mbox)
3045 next_stat_mbox = cs->first_stat_mbox;
3049 myrs_handle_cmdblk(cs, cmd_blk);
3051 myrs_handle_scsi(cs, cmd_blk, scmd);
3054 cs->next_stat_mbox = next_stat_mbox;
3055 spin_unlock_irqrestore(&cs->queue_lock, flags);
3071 struct myrs_hba *cs;
3074 cs = myrs_detect(dev, entry);
3075 if (!cs)
3078 ret = myrs_get_config(cs);
3080 myrs_cleanup(cs);
3084 if (!myrs_create_mempools(dev, cs)) {
3089 ret = scsi_add_host(cs->host, &dev->dev);
3092 myrs_destroy_mempools(cs);
3095 scsi_scan_host(cs->host);
3098 myrs_cleanup(cs);
3105 struct myrs_hba *cs = pci_get_drvdata(pdev);
3107 if (cs == NULL)
3110 shost_printk(KERN_NOTICE, cs->host, "Flushing Cache...");
3111 myrs_flush_cache(cs);
3112 myrs_destroy_mempools(cs);
3113 myrs_cleanup(cs);