Lines Matching refs:un

121 	(size_t)(&((struct lpfc_sli_ct_request *)NULL)->un)
951 iocb->un.cont64[i].tus.f.bdeSize;
991 size = iocbq->iocb.un.cont64[i].
993 bde = &iocbq->iocb.un.cont64[i];
1796 pmboxq->u.mb.un.varInitLnk.link_flags = FLAGS_LOCAL_LB;
1798 pmboxq->u.mb.un.varInitLnk.link_flags =
1883 link_diag_state = &pmboxq->u.mqe.un.link_diag_state;
1941 link_diag_loopback = &pmboxq->u.mqe.un.link_diag_loopback;
2410 run_link_diag_test = &pmboxq->u.mqe.un.link_diag_test;
2427 &pmboxq->u.mqe.un.sli4_config.header.cfg_shdr;
2532 *rpi = mbox->u.mb.un.varWords[0];
2928 cmd->un.quexri64cx.buff.bde.addrHigh =
2930 cmd->un.quexri64cx.buff.bde.addrLow =
2932 cmd->un.quexri64cx.buff.bde.tus.f.bdeSize =
2934 cmd->un.quexri64cx.buff.buffer_tag = mp[i]->buffer_tag;
2942 cmd->un.cont64[i].addrHigh = putPaddrHigh(mp[i]->phys);
2943 cmd->un.cont64[i].addrLow = putPaddrLow(mp[i]->phys);
2944 cmd->un.cont64[i].tus.f.bdeSize =
3491 mb->un.varWords[0],
3492 mb->un.varWords[1]);
3581 &sli_cfg_mbx->un.sli_config_emb0_subsys.sli_config_hdr)) {
3586 sli_cfg_mbx->un.sli_config_emb0_subsys.mse[0].buf_len);
3717 sli_cfg_mbx->un.sli_config_emb0_subsys.
3721 sli_cfg_mbx->un.sli_config_emb0_subsys.
3729 sli_cfg_mbx->un.sli_config_emb0_subsys.
3731 sli_cfg_mbx->un.sli_config_emb0_subsys.
3733 sli_cfg_mbx->un.sli_config_emb0_subsys.
3736 sli_cfg_mbx->un.sli_config_emb0_subsys.
3739 sli_cfg_mbx->un.sli_config_emb0_subsys.
3746 sli_cfg_mbx->un.sli_config_emb0_subsys.
3748 sli_cfg_mbx->un.sli_config_emb0_subsys.
3750 sli_cfg_mbx->un.sli_config_emb0_subsys.
3755 sli_cfg_mbx->un.sli_config_emb1_subsys.
3759 sli_cfg_mbx->un.sli_config_emb1_subsys.
3768 &sli_cfg_mbx->un.
3770 sli_cfg_mbx->un.sli_config_emb1_subsys.
3772 sli_cfg_mbx->un.sli_config_emb1_subsys.
3776 sli_cfg_mbx->un.sli_config_emb1_subsys.
3779 sli_cfg_mbx->un.sli_config_emb1_subsys.
3787 &sli_cfg_mbx->un.
3789 sli_cfg_mbx->un.sli_config_emb1_subsys.
3791 sli_cfg_mbx->un.sli_config_emb1_subsys.
3833 &sli_cfg_mbx->un.sli_config_emb0_subsys.sli_config_hdr);
3854 ext_buf_cnt = sli_cfg_mbx->un.sli_config_emb1_subsys.hbd_count;
3958 &sli_cfg_mbx->un.sli_config_emb0_subsys.sli_config_hdr)) &&
3962 sli_cfg_mbx->un.sli_config_emb0_subsys.
4021 &sli_cfg_mbx->un.sli_config_emb0_subsys.sli_config_hdr);
4039 ext_buf_cnt = sli_cfg_mbx->un.sli_config_emb1_subsys.hbd_count;
4072 i, sli_cfg_mbx->un.sli_config_emb0_subsys.
4078 &sli_cfg_mbx->un.sli_config_emb1_subsys.
4179 &sli_cfg_mbx->un.sli_config_emb0_subsys.sli_config_hdr)) {
4181 &sli_cfg_mbx->un.sli_config_emb0_subsys);
4183 &sli_cfg_mbx->un.sli_config_emb0_subsys);
4243 &sli_cfg_mbx->un.sli_config_emb1_subsys);
4245 &sli_cfg_mbx->un.sli_config_emb1_subsys);
4332 &sli_cfg_mbx->un.sli_config_emb0_subsys.mse[index]);
4338 &sli_cfg_mbx->un.sli_config_emb1_subsys.hbd[index]);
4763 transmit_length = pmb->un.varWords[1];
4764 receive_length = pmb->un.varWords[4];
4773 pmb->un.varBIUdiag.un.s2.xmit_bde64.addrHigh =
4775 pmb->un.varBIUdiag.un.s2.xmit_bde64.addrLow =
4778 pmb->un.varBIUdiag.un.s2.rcv_bde64.addrHigh =
4780 + pmb->un.varBIUdiag.un.s2.xmit_bde64.tus.f.bdeSize);
4781 pmb->un.varBIUdiag.un.s2.rcv_bde64.addrLow =
4783 + pmb->un.varBIUdiag.un.s2.xmit_bde64.tus.f.bdeSize);
4785 rdEventLog = &pmb->un.varRdEventLog;
4799 pmb->un.varWords[3] = putPaddrLow(dmabuf->phys
4801 pmb->un.varWords[4] = putPaddrHigh(dmabuf->phys
4810 (pmb->un.varDmp.type != DMP_WELL_KNOWN)) {
4814 receive_length = pmb->un.varWords[2];
4822 pmb->un.varWords[3] = putPaddrLow(dmabuf->phys
4824 pmb->un.varWords[4] = putPaddrHigh(dmabuf->phys
4827 pmb->un.varUpdateCfg.co) {
4828 bde = (struct ulp_bde64 *)&pmb->un.varWords[4];
4842 sli4_config = &pmboxq->u.mqe.un.sli4_config;
4849 &pmb->un.varWords[0];