Lines Matching refs:msk
1015 static const u32 msk = BIT(CHL_INT2_RX_DISP_ERR_OFF) |
1020 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, msk | irq_msk);
1039 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2, msk);
1835 static const u32 msk = BIT(CHL_INT2_RX_DISP_ERR_OFF) |
1861 if (pci_dev->revision > 0x20 && (irq_value & msk)) {
1938 .msk = HGC_DQE_ECC_MB_ADDR_MSK,
1945 .msk = HGC_IOST_ECC_MB_ADDR_MSK,
1952 .msk = HGC_ITCT_ECC_MB_ADDR_MSK,
1959 .msk = HGC_LM_DFX_STATUS2_IOSTLIST_MSK,
1966 .msk = HGC_LM_DFX_STATUS2_ITCTLIST_MSK,
1973 .msk = HGC_CQE_ECC_MB_ADDR_MSK,
1980 .msk = HGC_RXM_DFX_STATUS14_MEM0_MSK,
1987 .msk = HGC_RXM_DFX_STATUS14_MEM1_MSK,
1994 .msk = HGC_RXM_DFX_STATUS14_MEM2_MSK,
2001 .msk = HGC_RXM_DFX_STATUS15_MEM3_MSK,
2008 .msk = AM_ROB_ECC_ERR_ADDR_MSK,
2027 val &= ecc_error->msk;
2052 { .msk = BIT(0), .msg = "IOST_AXI_W_ERR" },
2053 { .msk = BIT(1), .msg = "IOST_AXI_R_ERR" },
2054 { .msk = BIT(2), .msg = "ITCT_AXI_W_ERR" },
2055 { .msk = BIT(3), .msg = "ITCT_AXI_R_ERR" },
2056 { .msk = BIT(4), .msg = "SATA_AXI_W_ERR" },
2057 { .msk = BIT(5), .msg = "SATA_AXI_R_ERR" },
2058 { .msk = BIT(6), .msg = "DQE_AXI_R_ERR" },
2059 { .msk = BIT(7), .msg = "CQE_AXI_W_ERR" },
2064 { .msk = BIT(8), .msg = "CQE_WINFO_FIFO" },
2065 { .msk = BIT(9), .msg = "CQE_MSG_FIFIO" },
2066 { .msk = BIT(10), .msg = "GETDQE_FIFO" },
2067 { .msk = BIT(11), .msg = "CMDP_FIFO" },
2068 { .msk = BIT(12), .msg = "AWTCTRL_FIFO" },
2146 for (; sub->msk || sub->msg; sub++) {
2147 if (!(err_value & sub->msk))