scsi/fnic/vnic_wq.c

16 static int vnic_wq_get_ctrl(struct vnic_dev *vdev, struct vnic_wq *wq,
19 	wq->ctrl = vnic_dev_get_res(vdev, res_type, index);
21 	if (!wq->ctrl)
28 static int vnic_wq_alloc_ring(struct vnic_dev *vdev, struct vnic_wq *wq,
31 	return vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
35 static int vnic_wq_alloc_bufs(struct vnic_wq *wq)
38 	unsigned int i, j, count = wq->ring.desc_count;
42 		wq->bufs[i] = kzalloc(VNIC_WQ_BUF_BLK_SZ, GFP_ATOMIC);
43 		if (!wq->bufs[i]) {
50 		buf = wq->bufs[i];
53 			buf->desc = (u8 *)wq->ring.descs +
54 				wq->ring.desc_size * buf->index;
56 				buf->next = wq->bufs[0];
59 				buf->next = wq->bufs[i + 1];
67 	wq->to_use = wq->to_clean = wq->bufs[0];
72 void vnic_wq_free(struct vnic_wq *wq)
77 	vdev = wq->vdev;
79 	vnic_dev_free_desc_ring(vdev, &wq->ring);
82 		kfree(wq->bufs[i]);
83 		wq->bufs[i] = NULL;
86 	wq->ctrl = NULL;
90 int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,
95 	wq->index = index;
96 	wq->vdev = vdev;
98 	wq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_WQ, index);
99 	if (!wq->ctrl) {
104 	vnic_wq_disable(wq);
106 	err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
110 	err = vnic_wq_alloc_bufs(wq);
112 		vnic_wq_free(wq);
120 int vnic_wq_devcmd2_alloc(struct vnic_dev *vdev, struct vnic_wq *wq,
125 	wq->index = 0;
126 	wq->vdev = vdev;
128 	err = vnic_wq_get_ctrl(vdev, wq, 0, RES_TYPE_DEVCMD2);
133 	vnic_wq_disable(wq);
135 	err = vnic_wq_alloc_ring(vdev, wq, desc_count, desc_size);
141 void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,
147 	unsigned int count = wq->ring.desc_count;
149 	paddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET;
150 	writeq(paddr, &wq->ctrl->ring_base);
151 	iowrite32(count, &wq->ctrl->ring_size);
152 	iowrite32(fetch_index, &wq->ctrl->fetch_index);
153 	iowrite32(posted_index, &wq->ctrl->posted_index);
154 	iowrite32(cq_index, &wq->ctrl->cq_index);
155 	iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);
156 	iowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);
157 	iowrite32(0, &wq->ctrl->error_status);
159 	wq->to_use = wq->to_clean =
160 		&wq->bufs[fetch_index / VNIC_WQ_BUF_BLK_ENTRIES]
165 void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
171 	paddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET;
172 	writeq(paddr, &wq->ctrl->ring_base);
173 	iowrite32(wq->ring.desc_count, &wq->ctrl->ring_size);
174 	iowrite32(0, &wq->ctrl->fetch_index);
175 	iowrite32(0, &wq->ctrl->posted_index);
176 	iowrite32(cq_index, &wq->ctrl->cq_index);
177 	iowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);
178 	iowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);
179 	iowrite32(0, &wq->ctrl->error_status);
182 unsigned int vnic_wq_error_status(struct vnic_wq *wq)
184 	return ioread32(&wq->ctrl->error_status);
187 void vnic_wq_enable(struct vnic_wq *wq)
189 	iowrite32(1, &wq->ctrl->enable);
192 int vnic_wq_disable(struct vnic_wq *wq)
196 	iowrite32(0, &wq->ctrl->enable);
200 		if (!(ioread32(&wq->ctrl->running)))
205 	printk(KERN_ERR "Failed to disable WQ[%d]\n", wq->index);
210 void vnic_wq_clean(struct vnic_wq *wq,
211 	void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf))
215 	BUG_ON(ioread32(&wq->ctrl->enable));
217 	buf = wq->to_clean;
219 	while (vnic_wq_desc_used(wq) > 0) {
221 		(*buf_clean)(wq, buf);
223 		buf = wq->to_clean = buf->next;
224 		wq->ring.desc_avail++;
227 	wq->to_use = wq->to_clean = wq->bufs[0];
229 	iowrite32(0, &wq->ctrl->fetch_index);
230 	iowrite32(0, &wq->ctrl->posted_index);
231 	iowrite32(0, &wq->ctrl->error_status);
233 	vnic_dev_clear_desc_ring(&wq->ring);