Lines Matching defs:phba
75 struct beiscsi_hba *phba = iscsi_host_priv(shost); \
77 phba->attr_##_name);\
82 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
85 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
88 phba->attr_##_name, val); \
89 phba->attr_##_name = val;\
92 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
106 struct beiscsi_hba *phba = iscsi_host_priv(shost);\
112 if (beiscsi_##_name##_change(phba, param_val) == 0) \
120 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
123 phba->attr_##_name = val;\
126 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
130 phba->attr_##_name = _defval;\
227 struct beiscsi_hba *phba;
252 phba = beiscsi_conn->phba;
254 if (is_chip_be2_be3r(phba)) {
265 rc = beiscsi_mgmt_invalidate_icds(phba, &inv_tbl, 1);
268 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
287 struct beiscsi_hba *phba;
304 phba = beiscsi_conn->phba;
309 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
344 if (is_chip_be2_be3r(phba)) {
365 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
371 if (beiscsi_mgmt_invalidate_icds(phba, &inv_tbl->tbl[0], nents)) {
372 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
428 struct beiscsi_hba *phba;
431 shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
442 phba = iscsi_host_priv(shost);
443 memset(phba, 0, sizeof(*phba));
444 phba->shost = shost;
445 phba->pcidev = pci_dev_get(pcidev);
446 pci_set_drvdata(pcidev, phba);
447 phba->interface_handle = 0xFFFFFFFF;
449 return phba;
452 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
454 if (phba->csr_va) {
455 iounmap(phba->csr_va);
456 phba->csr_va = NULL;
458 if (phba->db_va) {
459 iounmap(phba->db_va);
460 phba->db_va = NULL;
462 if (phba->pci_va) {
463 iounmap(phba->pci_va);
464 phba->pci_va = NULL;
468 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
478 phba->ctrl.csr = addr;
479 phba->csr_va = addr;
484 phba->ctrl.db = addr;
485 phba->db_va = addr;
487 if (phba->generation == BE_GEN2)
497 phba->ctrl.pcicfg = addr;
498 phba->pci_va = addr;
502 beiscsi_unmap_pci_function(phba);
543 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
545 struct be_ctrl_info *ctrl = &phba->ctrl;
551 status = beiscsi_map_pci_bars(phba, pdev);
558 beiscsi_unmap_pci_function(phba);
567 spin_lock_init(&phba->ctrl.mcc_lock);
574 * @phba: ptr device priv structure
576 static void beiscsi_get_params(struct beiscsi_hba *phba)
582 total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
583 BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
592 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
593 icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
594 icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
606 phba->fw_config.
621 phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
624 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
629 phba->fw_config.
631 phba->fw_config.
638 total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
639 phba->params.ios_per_ctrl = (total_icd_count -
642 phba->params.cxns_per_ctrl = total_cid_count;
643 phba->params.icds_per_ctrl = total_icd_count;
644 phba->params.num_sge_per_io = BE2_SGE;
645 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
646 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
647 phba->params.num_eq_entries = 1024;
648 phba->params.num_cq_entries = 1024;
649 phba->params.wrbs_per_cxn = 256;
652 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
675 iowrite32(val, phba->db_va + DB_EQ_OFFSET);
685 struct beiscsi_hba *phba;
694 phba = pbe_eq->phba;
695 mcc = &phba->ctrl.mcc_obj.cq;
712 queue_work(phba->wq, &pbe_eq->mcc_work);
713 hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
725 struct beiscsi_hba *phba;
732 phba = pbe_eq->phba;
734 hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
747 struct beiscsi_hba *phba;
758 phba = dev_id;
759 ctrl = &phba->ctrl;
765 phwi_ctrlr = phba->phwi_ctrlr;
770 mcc = &phba->ctrl.mcc_obj.cq;
792 queue_work(phba->wq, &pbe_eq->mcc_work);
798 hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
802 static void beiscsi_free_irqs(struct beiscsi_hba *phba)
807 if (!phba->pcidev->msix_enabled) {
808 if (phba->pcidev->irq)
809 free_irq(phba->pcidev->irq, phba);
813 phwi_context = phba->phwi_ctrlr->phwi_ctxt;
814 for (i = 0; i <= phba->num_cpus; i++) {
815 free_irq(pci_irq_vector(phba->pcidev, i),
817 kfree(phba->msi_name[i]);
821 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
823 struct pci_dev *pcidev = phba->pcidev;
828 phwi_ctrlr = phba->phwi_ctrlr;
832 for (i = 0; i < phba->num_cpus; i++) {
833 phba->msi_name[i] = kasprintf(GFP_KERNEL,
835 phba->shost->host_no, i);
836 if (!phba->msi_name[i]) {
842 be_isr_msix, 0, phba->msi_name[i],
845 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
848 kfree(phba->msi_name[i]);
852 phba->msi_name[i] = kasprintf(GFP_KERNEL, "beiscsi_mcc_%02x",
853 phba->shost->host_no);
854 if (!phba->msi_name[i]) {
859 phba->msi_name[i], &phwi_context->be_eq[i]);
861 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
864 kfree(phba->msi_name[i]);
870 "beiscsi", phba);
872 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
882 kfree(phba->msi_name[j]);
887 void hwi_ring_cq_db(struct beiscsi_hba *phba,
906 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
909 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
914 spin_lock_irqsave(&phba->io_sgl_lock, flags);
915 if (phba->io_sgl_hndl_avbl) {
916 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
919 phba->io_sgl_alloc_index);
921 psgl_handle = phba->io_sgl_hndl_base[phba->
923 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
924 phba->io_sgl_hndl_avbl--;
925 if (phba->io_sgl_alloc_index == (phba->params.
927 phba->io_sgl_alloc_index = 0;
929 phba->io_sgl_alloc_index++;
932 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
937 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
941 spin_lock_irqsave(&phba->io_sgl_lock, flags);
942 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
944 phba->io_sgl_free_index);
946 if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
951 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
953 phba->io_sgl_free_index,
954 phba->io_sgl_hndl_base[phba->io_sgl_free_index]);
955 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
958 phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
959 phba->io_sgl_hndl_avbl++;
960 if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
961 phba->io_sgl_free_index = 0;
963 phba->io_sgl_free_index++;
964 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
995 * @phba: The hba pointer
1001 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
1008 phwi_ctrlr = phba->phwi_ctrlr;
1012 return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
1035 * @phba: The hba pointer
1042 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1047 phba->params.wrbs_per_cxn);
1048 beiscsi_log(phba, KERN_INFO,
1056 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1061 spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1062 if (phba->eh_sgl_hndl_avbl) {
1063 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1064 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1065 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1067 phba->eh_sgl_alloc_index,
1068 phba->eh_sgl_alloc_index);
1070 phba->eh_sgl_hndl_avbl--;
1071 if (phba->eh_sgl_alloc_index ==
1072 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1074 phba->eh_sgl_alloc_index = 0;
1076 phba->eh_sgl_alloc_index++;
1079 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1084 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1088 spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1089 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1092 phba->eh_sgl_free_index);
1094 if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1099 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1102 phba->eh_sgl_free_index);
1103 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1106 phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1107 phba->eh_sgl_hndl_avbl++;
1108 if (phba->eh_sgl_free_index ==
1109 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1110 phba->eh_sgl_free_index = 0;
1112 phba->eh_sgl_free_index++;
1113 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1234 struct beiscsi_hba *phba, struct sol_cqe *psol)
1243 phwi_ctrlr = phba->phwi_ctrlr;
1244 if (is_chip_be2_be3r(phba)) {
1287 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1291 if (is_chip_be2_be3r(phba)) {
1342 struct beiscsi_hba *phba, struct sol_cqe *psol)
1354 phwi_ctrlr = phba->phwi_ctrlr;
1357 adapter_get_sol_cqe(phba, psol, &csol_cqe);
1391 beiscsi_log(phba, KERN_ERR,
1402 beiscsi_log(phba, KERN_WARNING,
1427 struct beiscsi_hba *phba = beiscsi_conn->phba;
1445 beiscsi_log(phba, KERN_ERR,
1457 beiscsi_log(phba, KERN_WARNING,
1478 beiscsi_hdl_purge_handles(struct beiscsi_hba *phba,
1501 struct beiscsi_hba *phba = beiscsi_conn->phba;
1518 if (is_chip_be2_be3r(phba)) {
1565 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1584 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1587 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1610 struct beiscsi_hba *phba = beiscsi_conn->phba;
1641 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1652 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1664 struct beiscsi_hba *phba;
1668 phba = beiscsi_conn->phba;
1709 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1718 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1724 beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
1735 phwi_ctrlr = phba->phwi_ctrlr;
1777 iowrite32(doorbell, phba->db_va + doorbell_offset);
1784 struct beiscsi_hba *phba = beiscsi_conn->phba;
1791 phwi_ctrlr = phba->phwi_ctrlr;
1797 if (is_chip_be2_be3r(phba))
1807 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
1810 void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
1816 mcc_cq = &phba->ctrl.mcc_obj.cq;
1820 if (beiscsi_hba_in_error(phba))
1824 hwi_ring_cq_db(phba, mcc_cq->id,
1829 beiscsi_process_async_event(phba, mcc_compl);
1831 beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
1842 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
1848 struct beiscsi_hba *phba;
1851 phba = pbe_eq->phba;
1852 beiscsi_process_mcc_cq(phba);
1854 if (!beiscsi_hba_in_error(phba))
1855 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1877 struct beiscsi_hba *phba;
1881 phba = pbe_eq->phba;
1885 if (beiscsi_hba_in_error(phba))
1894 if (is_chip_be2_be3r(phba)) {
1909 ep = phba->ep_array[cri_index];
1915 beiscsi_log(phba, KERN_WARNING,
1927 hwi_ring_cq_db(phba, cq->id, 32, 0);
1934 hwi_complete_cmd(beiscsi_conn, phba, sol);
1937 beiscsi_log(phba, KERN_INFO,
1942 hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
1945 beiscsi_log(phba, KERN_INFO,
1950 spin_lock_bh(&phba->async_pdu_lock);
1953 spin_unlock_bh(&phba->async_pdu_lock);
1956 beiscsi_log(phba, KERN_INFO,
1961 spin_lock_bh(&phba->async_pdu_lock);
1964 spin_unlock_bh(&phba->async_pdu_lock);
1969 beiscsi_log(phba, KERN_ERR,
1976 beiscsi_log(phba, KERN_ERR,
1988 beiscsi_log(phba, KERN_ERR,
1994 beiscsi_log(phba, KERN_ERR,
1998 spin_lock_bh(&phba->async_pdu_lock);
2002 spin_unlock_bh(&phba->async_pdu_lock);
2019 beiscsi_log(phba, KERN_ERR,
2028 beiscsi_log(phba, KERN_ERR,
2044 hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2051 struct beiscsi_hba *phba;
2057 phba = pbe_eq->phba;
2058 if (beiscsi_hba_in_error(phba)) {
2073 hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
2079 beiscsi_log(phba, KERN_INFO,
2083 if (!beiscsi_hba_in_error(phba))
2084 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2282 struct beiscsi_hba *phba = beiscsi_conn->phba;
2296 if (is_chip_be2_be3r(phba))
2305 io_task->mtask_addr = dma_map_single(&phba->pcidev->dev,
2309 if (dma_mapping_error(&phba->pcidev->dev,
2361 * @phba: ptr to HBA struct
2363 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2370 phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2372 phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2374 phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2378 phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2379 * (phba->params.wrbs_per_cxn)
2380 * phba->params.cxns_per_ctrl;
2382 (phba->params.wrbs_per_cxn);
2383 phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2384 phba->params.cxns_per_ctrl);
2386 phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2387 phba->params.icds_per_ctrl;
2388 phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2389 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2391 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2395 phba, ulp_num) *
2400 phba, ulp_num) *
2401 phba->params.defpdu_hdr_sz);
2405 phba, ulp_num) *
2406 phba->params.defpdu_data_sz);
2410 phba, ulp_num) *
2415 phba->mem_req[mem_descr_index] =
2416 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2421 phba->mem_req[mem_descr_index] =
2427 phba->mem_req[mem_descr_index] =
2433 phba->mem_req[mem_descr_index] =
2439 phba->mem_req[mem_descr_index] =
2445 phba->mem_req[mem_descr_index] =
2446 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2451 phba->mem_req[mem_descr_index] =
2452 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2457 phba->mem_req[mem_descr_index] =
2459 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2465 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2473 phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2474 if (!phba->phwi_ctrlr)
2478 phwi_ctrlr = phba->phwi_ctrlr;
2479 phwi_ctrlr->wrb_context = kcalloc(phba->params.cxns_per_ctrl,
2483 kfree(phba->phwi_ctrlr);
2487 phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2489 if (!phba->init_mem) {
2491 kfree(phba->phwi_ctrlr);
2499 kfree(phba->init_mem);
2501 kfree(phba->phwi_ctrlr);
2505 mem_descr = phba->init_mem;
2507 if (!phba->mem_req[i]) {
2515 alloc_size = phba->mem_req[i];
2521 dma_alloc_coherent(&phba->pcidev->dev,
2544 mem_descr->size_in_bytes = phba->mem_req[i];
2560 dma_free_coherent(&phba->pcidev->dev,
2575 kfree(phba->init_mem);
2576 kfree(phba->phwi_ctrlr->wrb_context);
2577 kfree(phba->phwi_ctrlr);
2581 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2583 beiscsi_find_mem_req(phba);
2584 return beiscsi_alloc_mem(phba);
2587 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2593 mem_descr = phba->init_mem;
2612 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2623 mem_descr_wrbh = phba->init_mem;
2626 mem_descr_wrb = phba->init_mem;
2628 phwi_ctrlr = phba->phwi_ctrlr;
2632 phwi_ctxt->be_wrbq = kcalloc(phba->params.cxns_per_ctrl,
2636 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2641 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2644 kcalloc(phba->params.wrbs_per_cxn,
2648 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2653 kcalloc(phba->params.wrbs_per_cxn,
2657 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2666 phba->params.wrbs_per_cxn));
2674 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2687 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2693 phba->params.wrbs_per_cxn));
2698 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2717 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2721 struct hba_parameters *p = &phba->params;
2728 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2730 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2734 phwi_ctrlr = phba->phwi_ctrlr;
2747 pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba,
2750 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2754 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2761 beiscsi_log(phba, KERN_WARNING,
2776 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2780 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2787 beiscsi_log(phba, KERN_WARNING,
2796 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2800 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2807 beiscsi_log(phba, KERN_WARNING,
2816 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2820 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2827 beiscsi_log(phba, KERN_WARNING,
2836 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2840 beiscsi_log(phba, KERN_WARNING,
2856 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2860 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2867 beiscsi_log(phba, KERN_WARNING,
2882 phba->params.defpdu_data_sz);
2886 (phba, ulp_num); index++) {
2925 phba->params.defpdu_data_sz);
2972 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2984 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3011 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3021 num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries *
3024 if (phba->pcidev->msix_enabled)
3028 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3031 phwi_context->be_eq[i].phba = phba;
3032 eq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
3041 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3044 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3050 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3053 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3058 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3065 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3069 dma_free_coherent(&phba->pcidev->dev, num_eq_pages
3076 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3087 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries *
3090 for (i = 0; i < phba->num_cpus; i++) {
3095 pbe_eq->phba = phba;
3097 cq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
3105 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3108 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3114 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3117 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3121 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3128 for (i = 0; i < phba->num_cpus; i++) {
3132 dma_free_coherent(&phba->pcidev->dev, num_cq_pages
3140 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3156 mem_descr = phba->init_mem;
3164 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3172 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3174 phba->params.defpdu_hdr_sz,
3177 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3184 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3192 beiscsi_create_def_data(struct beiscsi_hba *phba,
3208 mem_descr = phba->init_mem;
3216 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3225 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3227 phba->params.defpdu_data_sz,
3230 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3237 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3242 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3250 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3258 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3259 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3264 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3266 &phba->ctrl, &sgl);
3269 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3275 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3284 beiscsi_post_pages(struct beiscsi_hba *phba)
3292 mem_descr = phba->init_mem;
3297 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3300 page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3301 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3303 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3304 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3309 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3315 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3320 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3324 dma_free_coherent(&phba->pcidev->dev, mem->size,
3330 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3339 mem->va = dma_alloc_coherent(&phba->pcidev->dev, mem->size, &mem->dma,
3347 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3364 mem_descr = phba->init_mem;
3366 pwrb_arr = kmalloc_array(phba->params.cxns_per_ctrl,
3370 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3377 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3379 for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3383 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3394 (phba->params.wrbs_per_cxn *
3398 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3408 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3412 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3415 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3427 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3428 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3433 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3445 static void free_wrb_handles(struct beiscsi_hba *phba)
3451 phwi_ctrlr = phba->phwi_ctrlr;
3452 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3459 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3461 struct be_ctrl_info *ctrl = &phba->ctrl;
3466 q = &phba->ctrl.mcc_obj.q;
3510 be_queue_free(phba, q);
3513 q = &phba->ctrl.mcc_obj.cq;
3516 be_queue_free(phba, q);
3520 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3524 struct be_ctrl_info *ctrl = &phba->ctrl;
3527 cq = &phba->ctrl.mcc_obj.cq;
3528 if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3532 if (phba->pcidev->msix_enabled) {
3534 &phwi_context->be_eq[phba->num_cpus].q,
3544 q = &phba->ctrl.mcc_obj.q;
3545 if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3549 if (beiscsi_cmd_mccq_create(phba, q, cq))
3555 be_queue_free(phba, q);
3559 be_queue_free(phba, cq);
3564 static void be2iscsi_enable_msix(struct beiscsi_hba *phba)
3568 switch (phba->generation) {
3574 nvec = phba->fw_config.eqid_count;
3585 if (pci_alloc_irq_vectors_affinity(phba->pcidev, 2, nvec,
3587 phba->num_cpus = nvec - 1;
3592 phba->num_cpus = 1;
3595 static void hwi_purge_eq(struct beiscsi_hba *phba)
3604 if (beiscsi_hba_in_error(phba))
3607 phwi_ctrlr = phba->phwi_ctrlr;
3609 if (phba->pcidev->msix_enabled)
3614 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3627 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3631 static void hwi_cleanup_port(struct beiscsi_hba *phba)
3634 struct be_ctrl_info *ctrl = &phba->ctrl;
3640 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3641 beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3648 hwi_purge_eq(phba);
3650 phwi_ctrlr = phba->phwi_ctrlr;
3655 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3661 free_wrb_handles(phba);
3664 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3678 for (i = 0; i < (phba->num_cpus); i++) {
3681 be_queue_free(phba, q);
3686 be_mcc_queues_destroy(phba);
3687 if (phba->pcidev->msix_enabled)
3691 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3694 be_queue_free(phba, q);
3699 beiscsi_cmd_function_reset(phba);
3701 beiscsi_cmd_special_wrb(&phba->ctrl, 0);
3704 static int hwi_init_port(struct beiscsi_hba *phba)
3709 struct be_ctrl_info *ctrl = &phba->ctrl;
3713 phwi_ctrlr = phba->phwi_ctrlr;
3716 phba->optic_state = 0xff;
3718 status = beiscsi_create_eqs(phba, phwi_context);
3720 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3725 status = be_mcc_queues_create(phba, phwi_context);
3729 status = beiscsi_check_supported_fw(ctrl, phba);
3731 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3736 status = beiscsi_create_cqs(phba, phwi_context);
3738 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3744 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3748 status = beiscsi_create_def_hdr(phba, phwi_context,
3753 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3759 status = beiscsi_create_def_data(phba, phwi_context,
3764 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3773 beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
3775 beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
3780 status = beiscsi_post_pages(phba);
3782 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3787 status = beiscsi_post_template_hdr(phba);
3789 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3793 status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3795 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3803 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3810 phba->params.cxns_per_ctrl; cri++) {
3820 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3825 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3827 hwi_cleanup_port(phba);
3831 static int hwi_init_controller(struct beiscsi_hba *phba)
3835 phwi_ctrlr = phba->phwi_ctrlr;
3836 if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3837 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3839 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3843 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3849 iscsi_init_global_templates(phba);
3850 if (beiscsi_init_wrb_handle(phba))
3853 if (hwi_init_async_pdu_ctx(phba)) {
3854 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3859 if (hwi_init_port(phba) != 0) {
3860 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3868 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3873 mem_descr = phba->init_mem;
3876 dma_free_coherent(&phba->pcidev->dev,
3886 kfree(phba->init_mem);
3887 kfree(phba->phwi_ctrlr->wrb_context);
3888 kfree(phba->phwi_ctrlr);
3891 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3899 phba->io_sgl_hndl_avbl = 0;
3900 phba->eh_sgl_hndl_avbl = 0;
3902 mem_descr_sglh = phba->init_mem;
3905 phba->io_sgl_hndl_base = kcalloc(phba->params.ios_per_ctrl,
3908 if (!phba->io_sgl_hndl_base) {
3909 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3913 phba->eh_sgl_hndl_base =
3914 kcalloc(phba->params.icds_per_ctrl -
3915 phba->params.ios_per_ctrl,
3917 if (!phba->eh_sgl_hndl_base) {
3918 kfree(phba->io_sgl_hndl_base);
3919 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3924 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3937 if (arr_index < phba->params.ios_per_ctrl) {
3938 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3939 phba->io_sgl_hndl_avbl++;
3942 phba->eh_sgl_hndl_base[arr_index -
3943 phba->params.ios_per_ctrl] =
3946 phba->eh_sgl_hndl_avbl++;
3952 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3953 "BM_%d : phba->io_sgl_hndl_avbl=%d "
3954 "phba->eh_sgl_hndl_avbl=%d\n",
3955 phba->io_sgl_hndl_avbl,
3956 phba->eh_sgl_hndl_avbl);
3958 mem_descr_sg = phba->init_mem;
3960 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3965 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3968 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
3977 (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3979 if (arr_index < phba->params.ios_per_ctrl)
3980 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3982 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3983 phba->params.ios_per_ctrl];
3987 pfrag += phba->params.num_sge_per_io;
3992 phba->io_sgl_free_index = 0;
3993 phba->io_sgl_alloc_index = 0;
3994 phba->eh_sgl_free_index = 0;
3995 phba->eh_sgl_alloc_index = 0;
3999 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4006 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4017 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4028 phba, ulp_num);
4031 phba->cid_array_info[ulp_num] = ptr_cid_info;
4034 phba->ep_array = kcalloc(phba->params.cxns_per_ctrl,
4037 if (!phba->ep_array) {
4043 phba->conn_table = kcalloc(phba->params.cxns_per_ctrl,
4046 if (!phba->conn_table) {
4047 kfree(phba->ep_array);
4048 phba->ep_array = NULL;
4054 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4055 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4057 ptr_cid_info = phba->cid_array_info[ulp_num];
4059 phba->phwi_ctrlr->wrb_context[i].cid;
4064 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4065 ptr_cid_info = phba->cid_array_info[ulp_num];
4075 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4076 ptr_cid_info = phba->cid_array_info[ulp_num];
4081 phba->cid_array_info[ulp_num] = NULL;
4089 static void hwi_enable_intr(struct beiscsi_hba *phba)
4091 struct be_ctrl_info *ctrl = &phba->ctrl;
4099 phwi_ctrlr = phba->phwi_ctrlr;
4109 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4114 if (!phba->pcidev->msix_enabled) {
4116 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4119 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4121 for (i = 0; i <= phba->num_cpus; i++) {
4123 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4125 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4130 static void hwi_disable_intr(struct beiscsi_hba *phba)
4132 struct be_ctrl_info *ctrl = &phba->ctrl;
4142 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4146 static int beiscsi_init_port(struct beiscsi_hba *phba)
4150 ret = hwi_init_controller(phba);
4152 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4156 ret = beiscsi_init_sgl_handle(phba);
4158 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4163 ret = hba_setup_cid_tbls(phba);
4165 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4167 kfree(phba->io_sgl_hndl_base);
4168 kfree(phba->eh_sgl_hndl_base);
4174 hwi_cleanup_port(phba);
4178 static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
4183 kfree(phba->io_sgl_hndl_base);
4184 kfree(phba->eh_sgl_hndl_base);
4185 kfree(phba->ep_array);
4186 kfree(phba->conn_table);
4189 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4190 ptr_cid_info = phba->cid_array_info[ulp_num];
4195 phba->cid_array_info[ulp_num] = NULL;
4213 struct beiscsi_hba *phba = beiscsi_conn->phba;
4219 phwi_ctrlr = phba->phwi_ctrlr;
4225 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4230 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4235 dma_unmap_single(&phba->pcidev->dev,
4253 struct beiscsi_hba *phba = beiscsi_conn->phba;
4260 phwi_ctrlr = phba->phwi_ctrlr;
4272 free_wrb_handle(phba, pwrb_context,
4278 free_io_sgl_handle(phba, io_task->psgl_handle);
4299 struct beiscsi_hba *phba = beiscsi_conn->phba;
4313 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4317 if (is_chip_be2_be3r(phba))
4319 phba->init_mem,
4332 iowrite32(doorbell, phba->db_va +
4342 phba->params.wrbs_per_cxn);
4343 beiscsi_log(phba, KERN_INFO,
4373 struct beiscsi_hba *phba = beiscsi_conn->phba;
4395 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4397 beiscsi_log(phba, KERN_ERR,
4404 io_task->pwrb_handle = alloc_wrb_handle(phba,
4408 beiscsi_log(phba, KERN_ERR,
4421 alloc_mgmt_sgl_handle(phba);
4423 beiscsi_log(phba, KERN_ERR,
4436 alloc_wrb_handle(phba,
4440 beiscsi_log(phba, KERN_ERR,
4458 io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4460 beiscsi_log(phba, KERN_ERR,
4469 alloc_wrb_handle(phba,
4473 beiscsi_log(phba, KERN_ERR,
4492 free_io_sgl_handle(phba, io_task->psgl_handle);
4495 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4498 phwi_ctrlr = phba->phwi_ctrlr;
4503 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4518 struct beiscsi_hba *phba = beiscsi_conn->phba;
4566 iowrite32(doorbell, phba->db_va +
4579 struct beiscsi_hba *phba = beiscsi_conn->phba;
4627 iowrite32(doorbell, phba->db_va +
4637 struct beiscsi_hba *phba = beiscsi_conn->phba;
4647 if (is_chip_be2_be3r(phba)) {
4695 if (is_chip_be2_be3r(phba))
4703 if (is_chip_be2_be3r(phba))
4726 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4737 io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4745 iowrite32(doorbell, phba->db_va +
4754 struct beiscsi_hba *phba;
4759 phba = io_task->conn->phba;
4765 if (!beiscsi_hba_is_online(phba))
4778 beiscsi_log(phba, KERN_ERR,
4799 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4809 struct beiscsi_hba *phba;
4819 phba = iscsi_host_priv(shost);
4821 if (!beiscsi_hba_is_online(phba)) {
4822 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
4823 "BM_%d : HBA in error 0x%lx\n", phba->state);
4829 nonemb_cmd.va = dma_alloc_coherent(&phba->ctrl.pdev->dev,
4833 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4838 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4841 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4844 dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4850 phba->ctrl.mcc_wait[tag],
4851 phba->ctrl.mcc_tag_status[tag],
4855 if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
4857 &phba->ctrl.ptag_state[tag].tag_state);
4858 dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4862 extd_status = (phba->ctrl.mcc_tag_status[tag] &
4864 status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
4865 free_mcc_wrb(&phba->ctrl, tag);
4875 dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4878 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4890 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4899 static void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4902 beiscsi_log_enable_init(phba, beiscsi_log_enable);
4905 void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
4907 if (phba->boot_struct.boot_kset)
4911 if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
4914 phba->boot_struct.retry = 3;
4915 phba->boot_struct.tag = 0;
4916 phba->boot_struct.s_handle = s_handle;
4917 phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
4918 schedule_work(&phba->boot_work);
4930 struct beiscsi_hba *phba = data;
4931 struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
4994 struct beiscsi_hba *phba = data;
5001 phba->boot_struct.boot_sess.initiator_iscsiname);
5009 struct beiscsi_hba *phba = data;
5021 rc = beiscsi_get_macaddr(str, phba);
5075 struct beiscsi_hba *phba = data;
5077 scsi_host_put(phba->shost);
5080 static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
5082 struct boot_struct *bs = &phba->boot_struct;
5086 __beiscsi_log(phba, KERN_ERR,
5091 bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
5093 __beiscsi_log(phba, KERN_ERR,
5098 /* get shost ref because the show function will refer phba */
5099 if (!scsi_host_get(phba->shost))
5102 boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
5109 if (!scsi_host_get(phba->shost))
5112 boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
5119 if (!scsi_host_get(phba->shost))
5122 boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
5132 scsi_host_put(phba->shost);
5141 struct beiscsi_hba *phba =
5143 struct boot_struct *bs = &phba->boot_struct;
5146 if (!beiscsi_hba_is_online(phba))
5149 beiscsi_log(phba, KERN_INFO,
5152 __func__, phba->boot_struct.action);
5154 switch (phba->boot_struct.action) {
5156 tag = beiscsi_boot_reopen_sess(phba);
5159 tag = __beiscsi_boot_get_shandle(phba, 1);
5162 tag = beiscsi_boot_get_sinfo(phba);
5165 tag = beiscsi_boot_logout_sess(phba);
5168 beiscsi_boot_create_kset(phba);
5174 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5179 schedule_work(&phba->boot_work);
5181 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5191 struct beiscsi_hba *phba;
5197 phba = container_of(work, struct beiscsi_hba, eqd_update.work);
5198 if (!beiscsi_hba_is_online(phba))
5201 phwi_ctrlr = phba->phwi_ctrlr;
5204 for (i = 0; i <= phba->num_cpus; i++) {
5205 aic = &phba->aic_obj[i];
5235 beiscsi_modify_eq_delay(phba, set_eqd, num);
5237 schedule_delayed_work(&phba->eqd_update,
5243 struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
5247 if (!beiscsi_detect_tpe(phba))
5252 if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
5253 wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
5254 queue_delayed_work(phba->wq, &phba->recover_port,
5260 struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
5262 beiscsi_detect_ue(phba);
5263 if (beiscsi_detect_ue(phba)) {
5264 __beiscsi_log(phba, KERN_ERR,
5265 "BM_%d : port in error: %lx\n", phba->state);
5267 queue_work(phba->wq, &phba->sess_work);
5270 if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
5273 phba->hw_check.function = beiscsi_hw_tpe_check;
5276 mod_timer(&phba->hw_check,
5285 * @phba: Instance of driver private structure
5288 static int beiscsi_enable_port(struct beiscsi_hba *phba)
5295 if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
5296 __beiscsi_log(phba, KERN_ERR,
5298 __func__, phba->state);
5302 ret = beiscsi_init_sliport(phba);
5306 be2iscsi_enable_msix(phba);
5308 beiscsi_get_params(phba);
5309 beiscsi_set_host_data(phba);
5311 beiscsi_set_uer_feature(phba);
5313 phba->shost->max_id = phba->params.cxns_per_ctrl - 1;
5314 phba->shost->can_queue = phba->params.ios_per_ctrl;
5315 ret = beiscsi_init_port(phba);
5317 __beiscsi_log(phba, KERN_ERR,
5323 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5324 phba->ctrl.mcc_tag[i] = i + 1;
5325 phba->ctrl.mcc_tag_status[i + 1] = 0;
5326 phba->ctrl.mcc_tag_available++;
5329 phwi_ctrlr = phba->phwi_ctrlr;
5331 for (i = 0; i < phba->num_cpus; i++) {
5336 i = (phba->pcidev->msix_enabled) ? i : 0;
5341 ret = beiscsi_init_irqs(phba);
5343 __beiscsi_log(phba, KERN_ERR,
5347 hwi_enable_intr(phba);
5349 set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5350 __beiscsi_log(phba, KERN_INFO,
5351 "BM_%d : port online: 0x%lx\n", phba->state);
5354 schedule_delayed_work(&phba->eqd_update,
5361 phba->hw_check.function = beiscsi_hw_health_check;
5362 mod_timer(&phba->hw_check,
5367 for (i = 0; i < phba->num_cpus; i++) {
5371 hwi_cleanup_port(phba);
5374 pci_free_irq_vectors(phba->pcidev);
5381 * @phba: Instance Priv structure
5386 static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
5393 if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
5396 phwi_ctrlr = phba->phwi_ctrlr;
5398 hwi_disable_intr(phba);
5399 beiscsi_free_irqs(phba);
5400 pci_free_irq_vectors(phba->pcidev);
5402 for (i = 0; i < phba->num_cpus; i++) {
5406 cancel_delayed_work_sync(&phba->eqd_update);
5407 cancel_work_sync(&phba->boot_work);
5409 if (!unload && beiscsi_hba_in_error(phba)) {
5413 hwi_cleanup_port(phba);
5414 beiscsi_cleanup_port(phba);
5419 struct beiscsi_hba *phba;
5421 phba = container_of(work, struct beiscsi_hba, sess_work);
5427 iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5432 struct beiscsi_hba *phba;
5434 phba = container_of(work, struct beiscsi_hba, recover_port.work);
5435 beiscsi_disable_port(phba, 0);
5436 beiscsi_enable_port(phba);
5442 struct beiscsi_hba *phba = NULL;
5444 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5445 set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
5447 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5451 del_timer_sync(&phba->hw_check);
5452 cancel_delayed_work_sync(&phba->recover_port);
5455 iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5456 beiscsi_disable_port(phba, 0);
5459 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5480 struct beiscsi_hba *phba = NULL;
5483 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5485 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5496 status = beiscsi_check_fw_rdy(phba);
5498 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5501 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5511 struct beiscsi_hba *phba;
5514 phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5517 ret = beiscsi_enable_port(phba);
5519 __beiscsi_log(phba, KERN_ERR,
5528 struct beiscsi_hba *phba = NULL;
5541 phba = beiscsi_hba_alloc(pcidev);
5542 if (!phba) {
5552 beiscsi_hba_attrs_init(phba);
5554 phba->mac_addr_set = false;
5560 phba->generation = BE_GEN2;
5561 phba->iotask_fn = beiscsi_iotask;
5567 phba->generation = BE_GEN3;
5568 phba->iotask_fn = beiscsi_iotask;
5571 phba->generation = BE_GEN4;
5572 phba->iotask_fn = beiscsi_iotask_v2;
5575 phba->generation = 0;
5578 ret = be_ctrl_init(phba, pcidev);
5580 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5585 ret = beiscsi_init_sliport(phba);
5589 spin_lock_init(&phba->io_sgl_lock);
5590 spin_lock_init(&phba->mgmt_sgl_lock);
5591 spin_lock_init(&phba->async_pdu_lock);
5592 ret = beiscsi_get_fw_config(&phba->ctrl, phba);
5594 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5598 beiscsi_get_port_name(&phba->ctrl, phba);
5599 beiscsi_get_params(phba);
5600 beiscsi_set_host_data(phba);
5601 beiscsi_set_uer_feature(phba);
5603 be2iscsi_enable_msix(phba);
5605 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5607 phba->num_cpus);
5609 phba->shost->max_id = phba->params.cxns_per_ctrl;
5610 phba->shost->can_queue = phba->params.ios_per_ctrl;
5611 ret = beiscsi_get_memory(phba);
5613 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5618 ret = beiscsi_init_port(phba);
5620 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5622 beiscsi_free_mem(phba);
5627 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5628 phba->ctrl.mcc_tag[i] = i + 1;
5629 phba->ctrl.mcc_tag_status[i + 1] = 0;
5630 phba->ctrl.mcc_tag_available++;
5631 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5635 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5638 phba->shost->host_no);
5639 phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
5640 if (!phba->wq) {
5641 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5648 INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
5650 phwi_ctrlr = phba->phwi_ctrlr;
5653 for (i = 0; i < phba->num_cpus; i++) {
5658 i = (phba->pcidev->msix_enabled) ? i : 0;
5663 ret = beiscsi_init_irqs(phba);
5665 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5670 hwi_enable_intr(phba);
5672 ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
5677 set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5678 __beiscsi_log(phba, KERN_INFO,
5679 "BM_%d : port online: 0x%lx\n", phba->state);
5681 INIT_WORK(&phba->boot_work, beiscsi_boot_work);
5682 ret = beiscsi_boot_get_shandle(phba, &s_handle);
5684 beiscsi_start_boot_work(phba, s_handle);
5690 set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
5693 beiscsi_iface_create_default(phba);
5694 schedule_delayed_work(&phba->eqd_update,
5697 INIT_WORK(&phba->sess_work, beiscsi_sess_work);
5698 INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
5703 timer_setup(&phba->hw_check, beiscsi_hw_health_check, 0);
5704 mod_timer(&phba->hw_check,
5706 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5711 hwi_disable_intr(phba);
5712 beiscsi_free_irqs(phba);
5714 for (i = 0; i < phba->num_cpus; i++) {
5718 destroy_workqueue(phba->wq);
5720 hwi_cleanup_port(phba);
5721 beiscsi_cleanup_port(phba);
5722 beiscsi_free_mem(phba);
5724 dma_free_coherent(&phba->pcidev->dev,
5725 phba->ctrl.mbox_mem_alloced.size,
5726 phba->ctrl.mbox_mem_alloced.va,
5727 phba->ctrl.mbox_mem_alloced.dma);
5728 beiscsi_unmap_pci_function(phba);
5730 pci_disable_msix(phba->pcidev);
5731 pci_dev_put(phba->pcidev);
5732 iscsi_host_free(phba->shost);
5742 struct beiscsi_hba *phba = NULL;
5744 phba = pci_get_drvdata(pcidev);
5745 if (!phba) {
5746 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5751 del_timer_sync(&phba->hw_check);
5752 cancel_delayed_work_sync(&phba->recover_port);
5753 cancel_work_sync(&phba->sess_work);
5755 beiscsi_iface_destroy_default(phba);
5756 iscsi_host_remove(phba->shost, false);
5757 beiscsi_disable_port(phba, 1);
5760 iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
5763 destroy_workqueue(phba->wq);
5764 beiscsi_free_mem(phba);
5767 beiscsi_unmap_pci_function(phba);
5768 dma_free_coherent(&phba->pcidev->dev,
5769 phba->ctrl.mbox_mem_alloced.size,
5770 phba->ctrl.mbox_mem_alloced.va,
5771 phba->ctrl.mbox_mem_alloced.dma);
5773 pci_dev_put(phba->pcidev);
5774 iscsi_host_free(phba->shost);