Lines Matching refs:esp

27 			shost_printk(KERN_DEBUG, esp->host, f, ##a);	\
92 struct esp *esp;
96 static void pci_esp_dma_drain(struct esp *esp);
98 static inline struct pci_esp_priv *pci_esp_get_priv(struct esp *esp)
100 return dev_get_drvdata(esp->dev);
103 static void pci_esp_write8(struct esp *esp, u8 val, unsigned long reg)
105 iowrite8(val, esp->regs + (reg * 4UL));
108 static u8 pci_esp_read8(struct esp *esp, unsigned long reg)
110 return ioread8(esp->regs + (reg * 4UL));
113 static void pci_esp_write32(struct esp *esp, u32 val, unsigned long reg)
115 return iowrite32(val, esp->regs + (reg * 4UL));
118 static int pci_esp_irq_pending(struct esp *esp)
120 struct pci_esp_priv *pep = pci_esp_get_priv(esp);
122 pep->dma_status = pci_esp_read8(esp, ESP_DMA_STATUS);
134 static void pci_esp_reset_dma(struct esp *esp)
139 static void pci_esp_dma_drain(struct esp *esp)
145 if ((esp->sreg & ESP_STAT_PMASK) == ESP_DOP ||
146 (esp->sreg & ESP_STAT_PMASK) == ESP_DIP)
151 resid = pci_esp_read8(esp, ESP_FFLAGS) & ESP_FF_FBYTES;
165 pci_esp_write8(esp, ESP_DMA_CMD_DIR | ESP_DMA_CMD_BLAST, ESP_DMA_CMD);
166 while (pci_esp_read8(esp, ESP_DMA_STATUS) & ESP_DMA_STAT_BCMPLT) {
171 pci_esp_write8(esp, ESP_DMA_CMD_DIR | ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
175 struct esp_cmd_entry *ent = esp->active_cmd;
181 static void pci_esp_dma_invalidate(struct esp *esp)
183 struct pci_esp_priv *pep = pci_esp_get_priv(esp);
187 pci_esp_write8(esp, ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
191 static int pci_esp_dma_error(struct esp *esp)
193 struct pci_esp_priv *pep = pci_esp_get_priv(esp);
196 u8 dma_cmd = pci_esp_read8(esp, ESP_DMA_CMD);
199 pci_esp_write8(esp, ESP_DMA_CMD_ABORT, ESP_DMA_CMD);
204 pci_esp_write8(esp, ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
205 pep->dma_status = pci_esp_read8(esp, ESP_DMA_CMD);
211 static void pci_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
214 struct pci_esp_priv *pep = pci_esp_get_priv(esp);
225 pci_esp_write8(esp, ESP_DMA_CMD_IDLE | val, ESP_DMA_CMD);
227 pci_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
228 pci_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
229 if (esp->config2 & ESP_CONFIG2_FENAB)
230 pci_esp_write8(esp, (esp_count >> 16) & 0xff, ESP_TCHI);
232 pci_esp_write32(esp, esp_count, ESP_DMA_STC);
233 pci_esp_write32(esp, addr, ESP_DMA_SPA);
238 scsi_esp_cmd(esp, cmd);
240 pci_esp_write8(esp, ESP_DMA_CMD_START | val, ESP_DMA_CMD);
243 static u32 pci_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
252 if (esp->config2 & ESP_CONFIG2_FENAB)
347 static void dc390_check_eeprom(struct esp *esp)
349 struct pci_dev *pdev = to_pci_dev(esp->dev);
365 esp->scsi_id = EEbuf[DC390_EE_ADAPT_SCSI_ID];
366 esp->num_tags = 2 << EEbuf[DC390_EE_TAG_CMD_NUM];
368 esp->config4 |= ESP_CONFIG4_RADE | ESP_CONFIG4_RAE;
377 struct esp *esp;
391 shost = scsi_host_alloc(hostt, sizeof(struct esp));
407 esp = shost_priv(shost);
408 esp->host = shost;
409 esp->dev = &pdev->dev;
410 esp->ops = &pci_esp_ops;
416 esp->flags |= ESP_FLAG_USE_FIFO;
421 esp->config2 |= ESP_CONFIG2_FENAB;
423 pep->esp = esp;
431 esp->regs = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
432 if (!esp->regs) {
437 esp->dma_regs = esp->regs;
441 esp->command_block = dma_alloc_coherent(&pdev->dev, 16,
442 &esp->command_block_dma, GFP_KERNEL);
443 if (!esp->command_block) {
453 DRV_MODULE_NAME, esp);
459 esp->scsi_id = 7;
460 dc390_check_eeprom(esp);
462 shost->this_id = esp->scsi_id;
468 esp->scsi_id_mask = (1 << esp->scsi_id);
470 esp->cfreq = 40000000;
472 err = scsi_esp_register(esp);
479 free_irq(pdev->irq, esp);
482 dma_free_coherent(&pdev->dev, 16, esp->command_block,
483 esp->command_block_dma);
485 pci_iounmap(pdev, esp->regs);
501 struct esp *esp = pep->esp;
503 scsi_esp_unregister(esp);
504 free_irq(pdev->irq, esp);
506 dma_free_coherent(&pdev->dev, 16, esp->command_block,
507 esp->command_block_dma);
508 pci_iounmap(pdev, esp->regs);
513 scsi_host_put(esp->host);