drivers/scsi/a100u2w.c

208 	outb(ORC_CMD_VERSION, host->base + ORC_HDATA);
209 	outb(HDO, host->base + ORC_HCTRL);
216 	outb(data, host->base + ORC_HSTUS);	/* Clear HDI            */
221 	outb(data, host->base + ORC_HSTUS);	/* Clear HDI            */
229 	outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA);	/* Write command */
230 	outb(HDO, host->base + ORC_HCTRL);
234 	outb(address, host->base + ORC_HDATA);	/* Write address */
235 	outb(HDO, host->base + ORC_HCTRL);
239 	outb(value, host->base + ORC_HDATA);	/* Write value  */
240 	outb(HDO, host->base + ORC_HCTRL);
252 	outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA);	/* Write command */
253 	outb(HDO, host->base + ORC_HCTRL);
257 	outb(address, host->base + ORC_HDATA);	/* Write address */
258 	outb(HDO, host->base + ORC_HCTRL);
265 	outb(data, host->base + ORC_HSTUS);	/* Clear HDI    */
280 	outb(scb->scbidx, host->base + ORC_PQUEUE);
376 	outb(data | EEPRG, host->base + ORC_GCFG);	/* Enable EEPROM programming */
377 	outb(0x00, host->base + ORC_EBIOSADR2);
380 		outb(data, host->base + ORC_GCFG);	/* Disable EEPROM programming */
385 		outb(data, host->base + ORC_GCFG);	/* Disable EEPROM programming */
389 	outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);	/* Enable SRAM programming */
418 	outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);	/* Reset program count 0 */
427 				outb(PRGMRST, host->base + ORC_RISCCTL);	/* Reset program to 0 */
428 				outb(data, host->base + ORC_GCFG);	/*Disable EEPROM programming */
436 	outb(PRGMRST, host->base + ORC_RISCCTL);	/* Reset program to 0   */
437 	outb(data, host->base + ORC_GCFG);	/* Disable EEPROM programming */
450 	outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE);	/* Total number of SCBs */
506 	outb(0xFF, host->base + ORC_GIMSK);	/* Disable all interrupts */
511 			outb(DEVRST, host->base + ORC_HCTRL);	/* Reset Host Adapter   */
516 			outb(0x00, host->base + ORC_HCTRL);	/* clear HOSTSTOP       */
524 		outb(DEVRST, host->base + ORC_HCTRL);	/* Reset Host Adapter   */
529 		outb(HDO, host->base + ORC_HCTRL);	/* Do Hardware Reset &  */
554 	outb(0xFB, host->base + ORC_GIMSK);	/* enable RP FIFO interrupt     */
573 	outb(SCSIRST, host->base + ORC_HCTRL);
742 	outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA);	/* Write command */
743 	outb(HDO, host->base + ORC_HCTRL);
747 	outb(scb->scbidx, host->base + ORC_HDATA);	/* Write address */
748 	outb(HDO, host->base + ORC_HCTRL);
755 	outb(data, host->base + ORC_HSTUS);	/* Clear HDI    */