Lines Matching refs:iob
69 struct qeth_cmd_buffer *iob,
419 static void qeth_put_cmd(struct qeth_cmd_buffer *iob)
421 if (refcount_dec_and_test(&iob->ref_count)) {
422 kfree(iob->data);
423 kfree(iob);
437 struct qeth_cmd_buffer *iob = card->read_cmd;
438 struct qeth_channel *channel = iob->channel;
439 struct ccw1 *ccw = __ccw_from_cmd(iob);
446 memset(iob->data, 0, iob->length);
447 qeth_setup_ccw(ccw, CCW_CMD_READ, 0, iob->length, iob->data);
448 iob->callback = qeth_issue_next_read_cb;
450 qeth_get_cmd(iob);
453 rc = ccw_device_start(channel->ccwdev, ccw, (addr_t) iob, 0, 0);
455 channel->active_cmd = iob;
460 qeth_put_cmd(iob);
479 struct qeth_cmd_buffer *iob)
482 list_add_tail(&iob->list_entry, &card->cmd_waiter_list);
487 struct qeth_cmd_buffer *iob)
490 list_del(&iob->list_entry);
494 static void qeth_notify_cmd(struct qeth_cmd_buffer *iob, int reason)
496 iob->rc = reason;
497 complete(&iob->done);
880 struct qeth_cmd_buffer *iob;
886 list_for_each_entry(iob, &card->cmd_waiter_list, list_entry)
887 qeth_notify_cmd(iob, -ECANCELED);
913 struct qeth_cmd_buffer *iob,
916 qeth_put_cmd(iob);
919 static void qeth_cancel_cmd(struct qeth_cmd_buffer *iob, int rc)
921 qeth_notify_cmd(iob, rc);
922 qeth_put_cmd(iob);
929 struct qeth_cmd_buffer *iob;
934 iob = kzalloc(sizeof(*iob), GFP_KERNEL);
935 if (!iob)
938 iob->data = kzalloc(ALIGN(length, 8) + ccws * sizeof(struct ccw1),
940 if (!iob->data) {
941 kfree(iob);
945 init_completion(&iob->done);
946 spin_lock_init(&iob->lock);
947 refcount_set(&iob->ref_count, 1);
948 iob->channel = channel;
949 iob->timeout = timeout;
950 iob->length = length;
951 return iob;
955 struct qeth_cmd_buffer *iob,
966 rc = qeth_check_idx_response(card, iob->data);
978 cmd = __ipa_reply(iob);
988 if (tmp->match && tmp->match(tmp, iob)) {
1012 (unsigned long)iob);
1021 QETH_PDU_HEADER_SEQ_NO(iob->data),
1025 qeth_put_cmd(iob);
1188 * @intparm: expect pointer to iob
1192 * corresponding qeth channel is locked with last used iob as active_cmd.
1204 struct qeth_cmd_buffer *iob = NULL;
1237 iob = (struct qeth_cmd_buffer *) (addr_t)intparm;
1244 if (iob)
1245 qeth_cancel_cmd(iob, rc);
1259 if (iob && (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC |
1261 qeth_cancel_cmd(iob, -ECANCELED);
1262 iob = NULL;
1288 if (iob)
1289 qeth_cancel_cmd(iob, rc);
1296 if (scsw_cmd_is_valid_cc(&irb->scsw) && irb->scsw.cmd.cc == 1 && iob) {
1298 * active_cmd is still set to last iob
1301 rc = ccw_device_start_timeout(cdev, __ccw_from_cmd(iob),
1302 (addr_t)iob, 0, 0, iob->timeout);
1309 qeth_cancel_cmd(iob, rc);
1316 if (iob) {
1318 if (irb->scsw.cmd.count > iob->length) {
1319 qeth_cancel_cmd(iob, -EIO);
1322 if (iob->callback)
1323 iob->callback(card, iob,
1324 iob->length - irb->scsw.cmd.count);
1945 struct qeth_cmd_buffer *iob)
1947 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), &card->seqno.trans_hdr,
1949 if (iob->channel == &card->write)
1963 struct qeth_cmd_buffer *iob)
1965 qeth_idx_finalize_cmd(card, iob);
1967 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1970 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1973 iob->callback = qeth_release_buffer_cb;
1976 static bool qeth_mpc_match_reply(struct qeth_cmd_buffer *iob,
1987 struct qeth_cmd_buffer *iob;
1989 iob = qeth_alloc_cmd(&card->write, data_length, 1, QETH_TIMEOUT);
1990 if (!iob)
1993 memcpy(iob->data, data, data_length);
1994 qeth_setup_ccw(__ccw_from_cmd(iob), CCW_CMD_WRITE, 0, data_length,
1995 iob->data);
1996 iob->finalize = qeth_mpc_finalize_cmd;
1997 iob->match = qeth_mpc_match_reply;
1998 return iob;
2004 * @iob: qeth_cmd_buffer pointer
2008 * cb_cmd: pointer to the original iob for non-IPA
2024 struct qeth_cmd_buffer *iob,
2030 struct qeth_channel *channel = iob->channel;
2031 struct qeth_reply *reply = &iob->reply;
2032 long timeout = iob->timeout;
2041 qeth_trylock_channel(channel, iob),
2044 qeth_put_cmd(iob);
2048 if (iob->finalize)
2049 iob->finalize(card, iob);
2050 QETH_DBF_HEX(CTRL, 2, iob->data, min(iob->length, QETH_DBF_CTRL_LEN));
2052 qeth_enqueue_cmd(card, iob);
2054 /* This pairs with iob->callback, and keeps the iob alive after IO: */
2055 qeth_get_cmd(iob);
2059 rc = ccw_device_start_timeout(channel->ccwdev, __ccw_from_cmd(iob),
2060 (addr_t) iob, 0, 0, timeout);
2066 qeth_dequeue_cmd(card, iob);
2067 qeth_put_cmd(iob);
2072 timeout = wait_for_completion_interruptible_timeout(&iob->done,
2077 qeth_dequeue_cmd(card, iob);
2081 spin_lock_irq(&iob->lock);
2084 iob->rc = rc;
2085 spin_unlock_irq(&iob->lock);
2089 rc = iob->rc;
2092 qeth_put_cmd(iob);
2103 struct qeth_cmd_buffer *iob,
2106 struct qeth_node_desc *nd = (struct qeth_node_desc *) iob->data;
2132 qeth_notify_cmd(iob, rc);
2133 qeth_put_cmd(iob);
2139 struct qeth_cmd_buffer *iob;
2149 iob = qeth_alloc_cmd(channel, ciw->count, 1, QETH_RCD_TIMEOUT);
2150 if (!iob)
2153 iob->callback = qeth_read_conf_data_cb;
2154 qeth_setup_ccw(__ccw_from_cmd(iob), ciw->cmd, 0, iob->length,
2155 iob->data);
2157 return qeth_send_control_data(card, iob, NULL, NULL);
2162 struct qeth_cmd_buffer *iob)
2166 rc = qeth_check_idx_response(card, iob->data);
2170 if (QETH_IS_IDX_ACT_POS_REPLY(iob->data))
2175 QETH_IDX_ACT_CAUSE_CODE(iob->data));
2177 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
2195 struct qeth_cmd_buffer *iob,
2198 struct qeth_channel *channel = iob->channel;
2204 rc = qeth_idx_check_activate_response(card, channel, iob);
2208 memcpy(&peer_level, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2218 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2221 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2224 qeth_notify_cmd(iob, rc);
2225 qeth_put_cmd(iob);
2229 struct qeth_cmd_buffer *iob,
2232 struct qeth_channel *channel = iob->channel;
2238 rc = qeth_idx_check_activate_response(card, channel, iob);
2242 memcpy(&peer_level, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2252 qeth_notify_cmd(iob, rc);
2253 qeth_put_cmd(iob);
2257 struct qeth_cmd_buffer *iob)
2261 struct ccw1 *ccw = __ccw_from_cmd(iob);
2264 iob->data);
2265 qeth_setup_ccw(&ccw[1], CCW_CMD_READ, 0, iob->length, iob->data);
2266 iob->finalize = qeth_idx_finalize_cmd;
2269 memcpy(QETH_IDX_ACT_PNO(iob->data), &port, 1);
2270 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2272 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
2274 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &card->info.ddev_devno, 2);
2275 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &addr, 2);
2281 struct qeth_cmd_buffer *iob;
2286 iob = qeth_alloc_cmd(channel, QETH_BUFSIZE, 2, QETH_TIMEOUT);
2287 if (!iob)
2290 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
2291 qeth_idx_setup_activate_cmd(card, iob);
2292 iob->callback = qeth_idx_activate_read_channel_cb;
2294 rc = qeth_send_control_data(card, iob, NULL, NULL);
2305 struct qeth_cmd_buffer *iob;
2310 iob = qeth_alloc_cmd(channel, QETH_BUFSIZE, 2, QETH_TIMEOUT);
2311 if (!iob)
2314 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
2315 qeth_idx_setup_activate_cmd(card, iob);
2316 iob->callback = qeth_idx_activate_write_channel_cb;
2318 rc = qeth_send_control_data(card, iob, NULL, NULL);
2329 struct qeth_cmd_buffer *iob;
2333 iob = (struct qeth_cmd_buffer *) data;
2335 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2342 struct qeth_cmd_buffer *iob;
2346 iob = qeth_mpc_alloc_cmd(card, CM_ENABLE, CM_ENABLE_SIZE);
2347 if (!iob)
2350 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2352 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2355 return qeth_send_control_data(card, iob, qeth_cm_enable_cb, NULL);
2361 struct qeth_cmd_buffer *iob;
2365 iob = (struct qeth_cmd_buffer *) data;
2367 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2374 struct qeth_cmd_buffer *iob;
2378 iob = qeth_mpc_alloc_cmd(card, CM_SETUP, CM_SETUP_SIZE);
2379 if (!iob)
2382 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2384 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2386 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2388 return qeth_send_control_data(card, iob, qeth_cm_setup_cb, NULL);
2461 struct qeth_cmd_buffer *iob;
2466 iob = (struct qeth_cmd_buffer *) data;
2468 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2471 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2474 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
2478 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2481 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2499 struct qeth_cmd_buffer *iob;
2505 iob = qeth_mpc_alloc_cmd(card, ULP_ENABLE, ULP_ENABLE_SIZE);
2506 if (!iob)
2509 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
2510 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2511 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2513 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2515 rc = qeth_send_control_data(card, iob, qeth_ulp_enable_cb, &max_mtu);
2524 struct qeth_cmd_buffer *iob;
2528 iob = (struct qeth_cmd_buffer *) data;
2530 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2532 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2545 struct qeth_cmd_buffer *iob;
2549 iob = qeth_mpc_alloc_cmd(card, ULP_SETUP, ULP_SETUP_SIZE);
2550 if (!iob)
2553 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2555 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2557 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2560 memcpy(QETH_ULP_SETUP_CUA(iob->data), &card->info.ddev_devno, 2);
2562 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2563 return qeth_send_control_data(card, iob, qeth_ulp_setup_cb, NULL);
2762 struct qeth_cmd_buffer *iob;
2766 iob = qeth_mpc_alloc_cmd(card, DM_ACT, DM_ACT_SIZE);
2767 if (!iob)
2770 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2772 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2774 return qeth_send_control_data(card, iob, NULL, NULL);
3038 struct qeth_cmd_buffer *iob)
3040 qeth_mpc_finalize_cmd(card, iob);
3043 __ipa_cmd(iob)->hdr.seqno = card->seqno.ipa++;
3047 struct qeth_cmd_buffer *iob, u16 cmd_length)
3050 u16 total_length = iob->length;
3052 qeth_setup_ccw(__ccw_from_cmd(iob), CCW_CMD_WRITE, 0, total_length,
3053 iob->data);
3054 iob->finalize = qeth_ipa_finalize_cmd;
3056 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3057 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &total_length, 2);
3058 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
3059 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &cmd_length, 2);
3060 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &cmd_length, 2);
3061 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3063 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &cmd_length, 2);
3066 static bool qeth_ipa_match_reply(struct qeth_cmd_buffer *iob,
3071 return ipa_reply && (__ipa_cmd(iob)->hdr.seqno == ipa_reply->hdr.seqno);
3079 struct qeth_cmd_buffer *iob;
3083 iob = qeth_alloc_cmd(&card->write, IPA_PDU_HEADER_SIZE + data_length, 1,
3085 if (!iob)
3088 qeth_prepare_ipa_cmd(card, iob, data_length);
3089 iob->match = qeth_ipa_match_reply;
3091 hdr = &__ipa_cmd(iob)->hdr;
3100 return iob;
3118 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
3128 qeth_put_cmd(iob);
3134 rc = qeth_send_control_data(card, iob, reply_cb, reply_param);
3156 struct qeth_cmd_buffer *iob;
3160 iob = qeth_ipa_alloc_cmd(card, IPA_CMD_STARTLAN, QETH_PROT_NONE, 0);
3161 if (!iob)
3163 return qeth_send_ipa_cmd(card, iob, qeth_send_startlan_cb, NULL);
3202 struct qeth_cmd_buffer *iob;
3204 iob = qeth_ipa_alloc_cmd(card, IPA_CMD_SETADAPTERPARMS, QETH_PROT_IPV4,
3208 if (!iob)
3211 hdr = &__ipa_cmd(iob)->data.setadapterparms.hdr;
3216 return iob;
3222 struct qeth_cmd_buffer *iob;
3225 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3227 if (!iob)
3229 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3271 struct qeth_cmd_buffer *iob;
3274 iob = qeth_ipa_alloc_cmd(card, IPA_CMD_QIPASSIST, prot, 0);
3275 if (!iob)
3277 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3304 struct qeth_cmd_buffer *iob;
3311 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES, 0);
3312 if (!iob)
3314 return qeth_send_ipa_cmd(card, iob,
3323 struct qeth_cmd_buffer *iob;
3325 iob = qeth_ipa_alloc_cmd(card, IPA_CMD_SET_DIAG_ASS, QETH_PROT_NONE,
3327 if (!iob)
3330 cmd = &__ipa_cmd(iob)->data.diagass;
3333 return iob;
3354 struct qeth_cmd_buffer *iob;
3357 iob = qeth_get_diag_cmd(card, QETH_DIAGS_CMD_QUERY, 0);
3358 if (!iob)
3360 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3402 struct qeth_cmd_buffer *iob;
3406 iob = qeth_get_diag_cmd(card, QETH_DIAGS_CMD_TRAP, 64);
3407 if (!iob)
3409 cmd = __ipa_cmd(iob);
3426 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
4401 struct qeth_cmd_buffer *iob;
4407 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4409 if (!iob)
4411 cmd = __ipa_cmd(iob);
4413 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4442 struct qeth_cmd_buffer *iob;
4447 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4449 if (!iob)
4451 cmd = __ipa_cmd(iob);
4456 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4530 struct qeth_cmd_buffer *iob;
4542 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4544 if (!iob)
4546 cmd = __ipa_cmd(iob);
4550 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4690 struct qeth_cmd_buffer *iob;
4709 /* Sanitize user input, to avoid overflows in iob size calculation: */
4713 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, req_len);
4714 if (!iob)
4717 if (copy_from_user(&__ipa_cmd(iob)->data.setadapterparms.data.snmp,
4719 qeth_put_cmd(iob);
4725 qeth_put_cmd(iob);
4730 rc = qeth_send_ipa_cmd(card, iob, qeth_snmp_command_cb, &qinfo);
4773 struct qeth_cmd_buffer *iob;
4794 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4796 if (!iob) {
4800 cmd = __ipa_cmd(iob);
4804 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, &priv);
4914 struct qeth_cmd_buffer *iob;
4916 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4918 if (iob) {
4919 struct qeth_ipa_cmd *cmd = __ipa_cmd(iob);
4925 if (!qeth_send_ipa_cmd(card, iob,
6063 struct qeth_cmd_buffer *iob;
6066 iob = qeth_ipa_alloc_cmd(card, IPA_CMD_SETASSPARMS, prot,
6070 if (!iob)
6073 setassparms = &__ipa_cmd(iob)->data.setassparms;
6079 return iob;
6089 struct qeth_cmd_buffer *iob;
6092 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
6093 if (!iob)
6097 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = *data;
6098 return qeth_send_ipa_cmd(card, iob, qeth_setassparms_cb, NULL);
6602 struct qeth_cmd_buffer *iob;
6612 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6614 if (!iob)
6617 rc = qeth_send_ipa_cmd(card, iob, qeth_start_csum_cb, &features);
6626 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6629 if (!iob) {
6636 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = required_features;
6637 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
6690 struct qeth_cmd_buffer *iob;
6694 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6696 if (!iob)
6699 rc = qeth_send_ipa_cmd(card, iob, qeth_start_tso_cb, &tso_data);
6708 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6711 if (!iob) {
6717 __ipa_cmd(iob)->data.setassparms.data.caps.enabled =
6719 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);