drivers/rtc/rtc-imxdi.c

98  * struct imxdi_dev - private imxdi rtc data
171 static void di_write_busy_wait(const struct imxdi_dev *imxdi, u32 val,
175 	writel(val, imxdi->ioaddr + reg);
184 static void di_report_tamper_info(struct imxdi_dev *imxdi,  u32 dsr)
188 	dtcr = readl(imxdi->ioaddr + DTCR);
190 	dev_emerg(&imxdi->pdev->dev, "DryIce tamper event detected\n");
193 		dev_emerg(&imxdi->pdev->dev, "%sVoltage Tamper Event\n",
197 		dev_emerg(&imxdi->pdev->dev, "%s32768 Hz Clock Tamper Event\n",
201 		dev_emerg(&imxdi->pdev->dev, "%sTemperature Tamper Event\n",
205 		dev_emerg(&imxdi->pdev->dev,
210 		dev_emerg(&imxdi->pdev->dev, "%sExternal Boot Tamper Event\n",
214 		dev_emerg(&imxdi->pdev->dev, "%sExternal Tamper A Event\n",
218 		dev_emerg(&imxdi->pdev->dev, "%sExternal Tamper B Event\n",
222 		dev_emerg(&imxdi->pdev->dev, "%sWire-mesh Tamper Event\n",
226 		dev_emerg(&imxdi->pdev->dev,
231 		dev_emerg(&imxdi->pdev->dev, "%sTimer-counter Overflow Event\n",
235 static void di_what_is_to_be_done(struct imxdi_dev *imxdi,
238 	dev_emerg(&imxdi->pdev->dev, "Please cycle the %s power supply in order to get the DryIce/RTC unit working again\n",
242 static int di_handle_failure_state(struct imxdi_dev *imxdi, u32 dsr)
246 	dev_dbg(&imxdi->pdev->dev, "DSR register reports: %08X\n", dsr);
249 	di_report_tamper_info(imxdi, dsr);
251 	dcr = readl(imxdi->ioaddr + DCR);
255 		di_what_is_to_be_done(imxdi, "battery");
262 	di_what_is_to_be_done(imxdi, "main");
267 static int di_handle_valid_state(struct imxdi_dev *imxdi, u32 dsr)
270 	di_write_busy_wait(imxdi, DCAMR_UNSET, DCAMR);
271 	di_write_busy_wait(imxdi, 0, DCALR);
275 		di_write_busy_wait(imxdi, DSR_CAF, DSR);
280 static int di_handle_invalid_state(struct imxdi_dev *imxdi, u32 dsr)
288 	di_write_busy_wait(imxdi, 0x00000000, DTCR);
290 	di_write_busy_wait(imxdi, DCR_TDCSL, DCR);
292 	sec = readl(imxdi->ioaddr + DTCMR);
294 		dev_warn(&imxdi->pdev->dev,
301 	dcr = readl(imxdi->ioaddr + DCR);
305 			di_what_is_to_be_done(imxdi, "battery");
309 			di_what_is_to_be_done(imxdi, "main");
325 	di_write_busy_wait(imxdi, DSR_NVF, DSR);
327 	di_write_busy_wait(imxdi, DSR_TCO, DSR);
329 	di_write_busy_wait(imxdi, dcr | DCR_TCE, DCR);
331 	di_write_busy_wait(imxdi, sec, DTCMR);
334 	return di_handle_valid_state(imxdi, __raw_readl(imxdi->ioaddr + DSR));
337 static int di_handle_invalid_and_failure_state(struct imxdi_dev *imxdi, u32 dsr)
348 		dcr = __raw_readl(imxdi->ioaddr + DCR);
361 			di_what_is_to_be_done(imxdi, "battery");
366 			di_what_is_to_be_done(imxdi, "main");
372 	di_write_busy_wait(imxdi, 0x00000000, DTCR);
375 	di_write_busy_wait(imxdi, dsr & (DSR_WTD | DSR_ETBD | DSR_ETAD |
379 	dsr = readl(imxdi->ioaddr + DSR);
382 		dev_warn(&imxdi->pdev->dev,
391 	di_write_busy_wait(imxdi, DSR_SVF, DSR);
394 	dsr = readl(imxdi->ioaddr + DSR);
396 		dev_crit(&imxdi->pdev->dev,
399 		di_what_is_to_be_done(imxdi, "battery");
407 	return di_handle_invalid_state(imxdi, dsr);
410 static int di_handle_state(struct imxdi_dev *imxdi)
415 	dsr = readl(imxdi->ioaddr + DSR);
419 		dev_warn(&imxdi->pdev->dev, "Invalid stated unit detected\n");
420 		rc = di_handle_invalid_state(imxdi, dsr);
423 		dev_warn(&imxdi->pdev->dev, "Failure stated unit detected\n");
424 		rc = di_handle_failure_state(imxdi, dsr);
427 		dev_warn(&imxdi->pdev->dev,
429 		rc = di_handle_invalid_and_failure_state(imxdi, dsr);
432 		dev_notice(&imxdi->pdev->dev, "Unlocked unit detected\n");
433 		rc = di_handle_valid_state(imxdi, dsr);
442 static void di_int_enable(struct imxdi_dev *imxdi, u32 intr)
446 	spin_lock_irqsave(&imxdi->irq_lock, flags);
447 	writel(readl(imxdi->ioaddr + DIER) | intr,
448 	       imxdi->ioaddr + DIER);
449 	spin_unlock_irqrestore(&imxdi->irq_lock, flags);
455 static void di_int_disable(struct imxdi_dev *imxdi, u32 intr)
459 	spin_lock_irqsave(&imxdi->irq_lock, flags);
460 	writel(readl(imxdi->ioaddr + DIER) & ~intr,
461 	       imxdi->ioaddr + DIER);
462 	spin_unlock_irqrestore(&imxdi->irq_lock, flags);
472 static void clear_write_error(struct imxdi_dev *imxdi)
476 	dev_warn(&imxdi->pdev->dev, "WARNING: Register write error!\n");
479 	writel(DSR_WEF, imxdi->ioaddr + DSR);
483 		if ((readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
487 	dev_err(&imxdi->pdev->dev,
497 static int di_write_wait(struct imxdi_dev *imxdi, u32 val, int reg)
503 	mutex_lock(&imxdi->write_mutex);
506 	di_int_enable(imxdi, DIER_WCIE);
508 	imxdi->dsr = 0;
511 	writel(val, imxdi->ioaddr + reg);
514 	ret = wait_event_interruptible_timeout(imxdi->write_wait,
515 			imxdi->dsr & (DSR_WCF | DSR_WEF), msecs_to_jiffies(1));
520 		dev_warn(&imxdi->pdev->dev,
526 	if (imxdi->dsr & DSR_WEF) {
527 		clear_write_error(imxdi);
532 	mutex_unlock(&imxdi->write_mutex);
542 	struct imxdi_dev *imxdi = dev_get_drvdata(dev);
545 	now = readl(imxdi->ioaddr + DTCMR);
557 	struct imxdi_dev *imxdi = dev_get_drvdata(dev);
561 	dcr = readl(imxdi->ioaddr + DCR);
562 	dsr = readl(imxdi->ioaddr + DSR);
567 			di_what_is_to_be_done(imxdi, "battery");
572 			di_what_is_to_be_done(imxdi, "main");
578 	rc = di_write_wait(imxdi, 0, DTCLR);
582 	rc = di_write_wait(imxdi, rtc_tm_to_time64(tm), DTCMR);
586 	return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TCE, DCR);
592 	struct imxdi_dev *imxdi = dev_get_drvdata(dev);
595 		di_int_enable(imxdi, DIER_CAIE);
597 		di_int_disable(imxdi, DIER_CAIE);
608 	struct imxdi_dev *imxdi = dev_get_drvdata(dev);
611 	dcamr = readl(imxdi->ioaddr + DCAMR);
615 	alarm->enabled = (readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0;
618 	mutex_lock(&imxdi->write_mutex);
621 	alarm->pending = (readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
623 	mutex_unlock(&imxdi->write_mutex);
633 	struct imxdi_dev *imxdi = dev_get_drvdata(dev);
637 	rc = di_write_wait(imxdi, rtc_tm_to_time64(&alarm->time), DCAMR);
642 		di_int_enable(imxdi, DIER_CAIE);  /* enable alarm intr */
644 		di_int_disable(imxdi, DIER_CAIE); /* disable alarm intr */
662 	struct imxdi_dev *imxdi = dev_id;
666 	dier = readl(imxdi->ioaddr + DIER);
667 	dsr = readl(imxdi->ioaddr + DSR);
680 			di_int_disable(imxdi, DIER_SVIE);
682 			di_report_tamper_info(imxdi, dsr);
692 		if (list_empty_careful(&imxdi->write_wait.head))
698 			di_int_disable(imxdi, DIER_WCIE);
701 			imxdi->dsr |= dsr;
703 			wake_up_interruptible(&imxdi->write_wait);
713 			di_int_disable(imxdi, DIER_CAIE);
716 			schedule_work(&imxdi->work);
729 	struct imxdi_dev *imxdi = container_of(work,
733 	di_write_wait(imxdi, DSR_CAF, DSR);
736 	rtc_update_irq(imxdi->rtc, 1, RTC_AF | RTC_IRQF);
744 	struct imxdi_dev *imxdi;
748 	imxdi = devm_kzalloc(&pdev->dev, sizeof(*imxdi), GFP_KERNEL);
749 	if (!imxdi)
752 	imxdi->pdev = pdev;
754 	imxdi->ioaddr = devm_platform_ioremap_resource(pdev, 0);
755 	if (IS_ERR(imxdi->ioaddr))
756 		return PTR_ERR(imxdi->ioaddr);
758 	spin_lock_init(&imxdi->irq_lock);
771 	init_waitqueue_head(&imxdi->write_wait);
773 	INIT_WORK(&imxdi->work, dryice_work);
775 	mutex_init(&imxdi->write_mutex);
777 	imxdi->rtc = devm_rtc_allocate_device(&pdev->dev);
778 	if (IS_ERR(imxdi->rtc))
779 		return PTR_ERR(imxdi->rtc);
781 	imxdi->clk = devm_clk_get(&pdev->dev, NULL);
782 	if (IS_ERR(imxdi->clk))
783 		return PTR_ERR(imxdi->clk);
784 	rc = clk_prepare_enable(imxdi->clk);
793 	writel(0, imxdi->ioaddr + DIER);
795 	rc = di_handle_state(imxdi);
800 			      IRQF_SHARED, pdev->name, imxdi);
807 			      IRQF_SHARED, pdev->name, imxdi);
813 	platform_set_drvdata(pdev, imxdi);
818 	imxdi->rtc->ops = &dryice_rtc_ops;
819 	imxdi->rtc->range_max = U32_MAX;
821 	rc = devm_rtc_register_device(imxdi->rtc);
828 	clk_disable_unprepare(imxdi->clk);
835 	struct imxdi_dev *imxdi = platform_get_drvdata(pdev);
837 	flush_work(&imxdi->work);
840 	writel(0, imxdi->ioaddr + DIER);
842 	clk_disable_unprepare(imxdi->clk);