Lines Matching refs:hi_pwm_chip

84 	struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
86 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
92 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
94 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
101 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
104 freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);
109 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CFG0_ADDR(pwm->hwpwm),
112 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CFG1_ADDR(pwm->hwpwm),
120 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
123 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
126 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
133 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
137 freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);
138 base = hi_pwm_chip->base;
156 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
169 if (hi_pwm_chip->soc->quirk_force_enable && state->enabled)
194 struct hibvt_pwm_chip *hi_pwm_chip;
197 chip = devm_pwmchip_alloc(&pdev->dev, soc->num_pwms, sizeof(*hi_pwm_chip));
200 hi_pwm_chip = to_hibvt_pwm_chip(chip);
202 hi_pwm_chip->clk = devm_clk_get(&pdev->dev, NULL);
203 if (IS_ERR(hi_pwm_chip->clk)) {
205 PTR_ERR(hi_pwm_chip->clk));
206 return PTR_ERR(hi_pwm_chip->clk);
210 hi_pwm_chip->soc = soc;
212 hi_pwm_chip->base = devm_platform_ioremap_resource(pdev, 0);
213 if (IS_ERR(hi_pwm_chip->base))
214 return PTR_ERR(hi_pwm_chip->base);
216 ret = clk_prepare_enable(hi_pwm_chip->clk);
220 hi_pwm_chip->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
221 if (IS_ERR(hi_pwm_chip->rstc)) {
222 clk_disable_unprepare(hi_pwm_chip->clk);
223 return PTR_ERR(hi_pwm_chip->rstc);
226 reset_control_assert(hi_pwm_chip->rstc);
228 reset_control_deassert(hi_pwm_chip->rstc);
232 clk_disable_unprepare(hi_pwm_chip->clk);
237 hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(i),
249 struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
253 reset_control_assert(hi_pwm_chip->rstc);
255 reset_control_deassert(hi_pwm_chip->rstc);
257 clk_disable_unprepare(hi_pwm_chip->clk);