Lines Matching refs:period
47 struct fsl_pwm_periodcfg period;
120 rate = clk_get_rate(fpc->clk[fpc->period.clk_select]);
123 do_div(exval, rate >> fpc->period.clk_ps);
190 unsigned int period = fpc->period.mod_period + 1;
191 unsigned int period_ns = fsl_pwm_ticks_to_ns(fpc, period);
193 duty = (unsigned long long)duty_ns * period;
234 if (!fsl_pwm_calculate_period(fpc, newstate->period, &periodcfg)) {
235 dev_err(pwmchip_parent(chip), "failed to calculate new period\n");
242 * The Freescale FTM controller supports only a single period for
243 * all PWM channels, therefore verify if the newly computed period
244 * is different than the current period being used. In such case
245 * we allow to change the period only if no other pwm is running.
247 else if (!fsl_pwm_periodcfg_are_equal(&fpc->period, &periodcfg)) {
250 "Cannot change period for PWM %u, disable other PWMs first\n",
254 if (fpc->period.clk_select != periodcfg.clk_select) {
256 enum fsl_pwm_clk oldclk = fpc->period.clk_select;
276 fpc->period = periodcfg;
319 clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);
331 ret = clk_prepare_enable(fpc->clk[fpc->period.clk_select]);
337 clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);
482 clk_disable_unprepare(fpc->clk[fpc->period.clk_select]);
505 clk_prepare_enable(fpc->clk[fpc->period.clk_select]);