drivers/powercap/intel_rapl_common.c

154 static int get_pl_prim(struct rapl_domain *rd, int pl, enum pl_prims prim)
158 		if (prim == PL_ENABLE)
160 		if (prim == PL_CLAMP && rd->rp->priv->type != RAPL_IF_TPMI)
162 		if (prim == PL_LIMIT)
164 		if (prim == PL_TIME_WINDOW)
166 		if (prim == PL_MAX_POWER)
168 		if (prim == PL_LOCK)
172 		if (prim == PL_ENABLE)
174 		if (prim == PL_CLAMP && rd->rp->priv->type != RAPL_IF_TPMI)
176 		if (prim == PL_LIMIT)
178 		if (prim == PL_TIME_WINDOW)
180 		if (prim == PL_MAX_POWER)
182 		if (prim == PL_LOCK)
186 		if (prim == PL_LIMIT)
188 		if (prim == PL_ENABLE)
190 		/* PL4 would be around two times PL2, use same prim as PL2. */
191 		if (prim == PL_MAX_POWER)
193 		if (prim == PL_LOCK)
252 			      enum rapl_primitives prim,
255 			       enum rapl_primitives prim,
737 static struct rapl_primitive_info *get_rpi(struct rapl_package *rp, int prim)
741 	if (prim < 0 || prim > NR_RAPL_PRIMITIVES || !rpi)
744 	return &rpi[prim];
772 prim_fixups(struct rapl_domain *rd, enum rapl_primitives prim)
777 		return prim;
780 		return prim;
782 	switch (prim) {
796 		return prim;
814 			      enum rapl_primitives prim, bool xlate, u64 *data)
817 	enum rapl_primitives prim_fixed = prim_fixups(rd, prim);
830 		*data = rd->rdd.primitives[prim];
853 			       enum rapl_primitives prim,
856 	enum rapl_primitives prim_fixed = prim_fixups(rd, prim);
883 	enum rapl_primitives prim = get_pl_prim(rd, pl, pl_prim);
888 	return rapl_read_data_raw(rd, prim, xlate, data);
895 	enum rapl_primitives prim = get_pl_prim(rd, pl, pl_prim);
905 	return rapl_write_data_raw(rd, prim, value);
1293 	int dmn, prim;
1300 		for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++) {
1301 			struct rapl_primitive_info *rpi = get_rpi(rp, prim);
1303 			if (!rapl_read_data_raw(&rp->domains[dmn], prim,
1305 				rp->domains[dmn].rdd.primitives[prim] = val;