Lines Matching refs:ret

154 	int ret, status, cap, mode;
156 ret = regmap_read(data->regmap,
158 if (ret)
182 int ret;
184 ret = regmap_update_bits(data->regmap,
188 if (ret)
189 return ret;
199 ret = regmap_update_bits(data->regmap,
203 if (ret)
204 return ret;
226 int ret;
228 ret = regmap_update_bits(data->regmap,
232 if (ret)
233 return ret;
243 ret = regmap_update_bits(data->regmap,
246 if (ret)
247 return ret;
269 int ret, value;
271 ret = regmap_read(data->regmap,
273 if (ret)
274 return ret;
288 int volt, cur, oci, ocv, ret;
297 ret = sc27xx_fgu_read_last_cap(data, cap);
298 if (ret)
299 return ret;
308 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_CLBCNT_QMAXL,
310 if (ret)
311 return ret;
321 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_POCV, &volt);
322 if (ret)
323 return ret;
336 ret = sc27xx_fgu_save_last_cap(data, *cap);
337 if (ret)
338 return ret;
345 int ret;
347 ret = regmap_update_bits(data->regmap,
350 if (ret)
351 return ret;
353 ret = regmap_update_bits(data->regmap,
357 if (ret)
358 return ret;
367 int ccl, cch, ret;
369 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_CLBCNT_VALL,
371 if (ret)
372 return ret;
374 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_CLBCNT_VALH,
376 if (ret)
377 return ret;
387 int ret;
390 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_VOLTAGE_BUF,
392 if (ret)
393 return ret;
406 int ret;
409 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_CURRENT_BUF,
411 if (ret)
412 return ret;
425 int ret, cur_clbcnt, delta_clbcnt, delta_cap, temp;
428 ret = sc27xx_fgu_get_clbcnt(data, &cur_clbcnt);
429 if (ret)
430 return ret;
456 int ret, vol;
458 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_VOLTAGE, &vol);
459 if (ret)
460 return ret;
473 int ret, cur;
475 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_CURRENT, &cur);
476 if (ret)
477 return ret;
490 int vol, cur, ret, temp, resistance;
492 ret = sc27xx_fgu_get_vbat_vol(data, &vol);
493 if (ret)
494 return ret;
496 ret = sc27xx_fgu_get_current(data, &cur);
497 if (ret)
498 return ret;
502 ret = sc27xx_fgu_get_temp(data, &temp);
503 if (ret)
504 return ret;
519 int ret, vol;
521 ret = iio_read_channel_processed(data->charge_chan, &vol);
522 if (ret < 0)
523 return ret;
536 int ret, vol;
538 ret = sc27xx_fgu_get_vbat_vol(data, &vol);
539 if (ret)
540 return ret;
554 int i, ret = -EINVAL;
561 ret = power_supply_get_property(psy, POWER_SUPPLY_PROP_STATUS,
564 if (ret)
565 return ret;
570 return ret;
578 int ret = 0;
585 ret = sc27xx_fgu_get_status(data, &value);
586 if (ret)
593 ret = sc27xx_fgu_get_health(data, &value);
594 if (ret)
605 ret = sc27xx_fgu_get_temp(data, &value);
606 if (ret)
617 ret = sc27xx_fgu_get_capacity(data, &value);
618 if (ret)
625 ret = sc27xx_fgu_get_vbat_vol(data, &value);
626 if (ret)
633 ret = sc27xx_fgu_get_vbat_ocv(data, &value);
634 if (ret)
641 ret = sc27xx_fgu_get_charge_vol(data, &value);
642 if (ret)
649 ret = sc27xx_fgu_get_current(data, &value);
650 if (ret)
661 ret = sc27xx_fgu_get_clbcnt(data, &value);
662 if (ret)
672 ret = sc27xx_fgu_get_vol_now(data, &value);
673 if (ret)
680 ret = sc27xx_fgu_get_cur_now(data, &value);
681 if (ret)
692 ret = -EINVAL;
698 return ret;
706 int ret;
712 ret = sc27xx_fgu_save_last_cap(data, val->intval);
713 if (ret < 0)
719 ret = 0;
724 ret = 0;
728 ret = -EINVAL;
733 return ret;
777 int ret;
780 ret = sc27xx_fgu_get_clbcnt(data, &data->init_clbcnt);
781 if (ret)
788 int ret, ocv, chg_sts, adc;
790 ret = sc27xx_fgu_get_vbat_ocv(data, &ocv);
791 if (ret) {
796 ret = sc27xx_fgu_get_status(data, &chg_sts);
797 if (ret) {
878 int ret, cap;
883 ret = regmap_read(data->regmap, data->base + SC27XX_FGU_INT_STS,
885 if (ret)
888 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_INT_CLR,
890 if (ret)
900 ret = sc27xx_fgu_get_capacity(data, &cap);
901 if (ret)
996 int ret, delta_clbcnt, alarm_adc;
998 ret = power_supply_get_battery_info(data->battery, &info);
999 if (ret) {
1001 return ret;
1045 ret = sc27xx_fgu_calibration(data);
1046 if (ret)
1047 return ret;
1050 ret = regmap_update_bits(data->regmap, SC27XX_MODULE_EN0,
1052 if (ret) {
1054 return ret;
1058 ret = regmap_update_bits(data->regmap, SC27XX_CLK_EN0,
1060 if (ret) {
1065 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_INT_CLR,
1067 if (ret) {
1078 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_LOW_OVERLOAD,
1080 if (ret) {
1094 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_CLBCNT_DELTL,
1096 if (ret) {
1101 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_CLBCNT_DELTH,
1104 if (ret) {
1114 ret = sc27xx_fgu_get_boot_capacity(data, &data->init_cap);
1115 if (ret) {
1125 ret = sc27xx_fgu_set_clbcnt(data, data->init_clbcnt);
1126 if (ret) {
1138 return ret;
1147 int ret, irq;
1159 ret = device_property_read_u32(dev, "reg", &data->base);
1160 if (ret) {
1162 return ret;
1165 ret = device_property_read_u32(&pdev->dev,
1168 if (ret) {
1171 return ret;
1192 ret = gpiod_get_value_cansleep(data->gpiod);
1193 if (ret < 0) {
1195 return ret;
1198 data->bat_present = !!ret;
1212 ret = sc27xx_fgu_hw_init(data);
1213 if (ret) {
1215 return ret;
1218 ret = devm_add_action_or_reset(dev, sc27xx_fgu_disable, data);
1219 if (ret) {
1221 return ret;
1228 ret = devm_request_threaded_irq(data->dev, irq, NULL,
1232 if (ret) {
1234 return ret;
1243 ret = devm_request_threaded_irq(dev, irq, NULL,
1248 if (ret) {
1250 return ret;
1260 int ret;
1262 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_INT_EN,
1265 if (ret) {
1267 return ret;
1276 int ret, status, ocv;
1278 ret = sc27xx_fgu_get_status(data, &status);
1279 if (ret)
1280 return ret;
1290 ret = regmap_update_bits(data->regmap, data->base + SC27XX_FGU_INT_EN,
1293 if (ret) {
1295 return ret;
1298 ret = sc27xx_fgu_get_vbat_ocv(data, &ocv);
1299 if (ret)
1308 ret = regmap_update_bits(data->regmap,
1312 if (ret) {
1324 return ret;