power/supply/da9150-fg.c

88 static u32 da9150_fg_read_attr(struct da9150_fg *fg, u8 code, u8 size)
99 	da9150_read_qif(fg->da9150, read_addr, size, buf);
106 static void da9150_fg_write_attr(struct da9150_fg *fg, u8 code, u8 size,
121 	da9150_write_qif(fg->da9150, write_addr, size, buf);
125 static void da9150_fg_read_sync_start(struct da9150_fg *fg)
130 	mutex_lock(&fg->io_lock);
133 	res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
136 		da9150_fg_write_attr(fg, DA9150_QIF_SYNC,
144 		res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
150 		dev_err(fg->dev, "Failed to perform QIF read sync!\n");
157 static inline void da9150_fg_read_sync_end(struct da9150_fg *fg)
159 	mutex_unlock(&fg->io_lock);
163 static u32 da9150_fg_read_attr_sync(struct da9150_fg *fg, u8 code, u8 size)
167 	da9150_fg_read_sync_start(fg);
168 	val = da9150_fg_read_attr(fg, code, size);
169 	da9150_fg_read_sync_end(fg);
175 static void da9150_fg_write_attr_sync(struct da9150_fg *fg, u8 code, u8 size,
181 	mutex_lock(&fg->io_lock);
184 	res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
191 		res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
196 		dev_err(fg->dev, "Timeout waiting for existing QIF sync!\n");
197 		mutex_unlock(&fg->io_lock);
202 	da9150_fg_write_attr(fg, code, size, val);
210 		res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
214 	mutex_unlock(&fg->io_lock);
218 		dev_err(fg->dev, "Error performing QIF sync write for code %d\n",
223 static int da9150_fg_capacity(struct da9150_fg *fg,
226 	val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
235 static int da9150_fg_current_avg(struct da9150_fg *fg,
241 	da9150_fg_read_sync_start(fg);
242 	iavg = da9150_fg_read_attr(fg, DA9150_QIF_IAVG,
244 	shunt_val = da9150_fg_read_attr(fg, DA9150_QIF_SHUNT_VAL,
246 	sd_gain = da9150_fg_read_attr(fg, DA9150_QIF_SD_GAIN,
248 	da9150_fg_read_sync_end(fg);
260 static int da9150_fg_voltage_avg(struct da9150_fg *fg,
265 	val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_UAVG,
275 static int da9150_fg_charge_full(struct da9150_fg *fg,
278 	val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_FCC_MAH,
290 static int da9150_fg_temp(struct da9150_fg *fg,
293 	val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_NTCAVG,
313 	struct da9150_fg *fg = dev_get_drvdata(psy->dev.parent);
318 		ret = da9150_fg_capacity(fg, val);
321 		ret = da9150_fg_current_avg(fg, val);
324 		ret = da9150_fg_voltage_avg(fg, val);
327 		ret = da9150_fg_charge_full(fg, val);
330 		ret = da9150_fg_temp(fg, val);
341 static bool da9150_fg_soc_changed(struct da9150_fg *fg)
345 	da9150_fg_capacity(fg, &val);
346 	if (val.intval != fg->soc) {
347 		fg->soc = val.intval;
356 	struct da9150_fg *fg = container_of(work, struct da9150_fg, work.work);
359 	if (da9150_fg_soc_changed(fg))
360 		power_supply_changed(fg->battery);
362 	schedule_delayed_work(&fg->work, msecs_to_jiffies(fg->interval));
366 static void da9150_fg_soc_event_config(struct da9150_fg *fg)
370 	soc = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
373 	if (soc > fg->warn_soc) {
375 		da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
377 					  fg->warn_soc + 1);
378 	} else if ((soc <= fg->warn_soc) && (soc > fg->crit_soc)) {
383 		da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT,
385 					  fg->crit_soc + 1);
387 		da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
389 					  fg->warn_soc);
390 	} else if (soc <= fg->crit_soc) {
392 		da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT,
394 					  fg->crit_soc);
400 	struct da9150_fg *fg = data;
404 	e_fg_status = da9150_fg_read_attr(fg, DA9150_QIF_E_FG_STATUS,
409 		da9150_fg_soc_event_config(fg);
412 	da9150_fg_write_attr(fg, DA9150_QIF_E_FG_STATUS,
438 	.name		= "da9150-fg",
450 	struct da9150_fg *fg;
453 	fg = devm_kzalloc(dev, sizeof(*fg), GFP_KERNEL);
454 	if (fg == NULL)
457 	platform_set_drvdata(pdev, fg);
458 	fg->da9150 = da9150;
459 	fg->dev = dev;
461 	mutex_init(&fg->io_lock);
467 	fg->battery = devm_power_supply_register(dev, &fg_desc, NULL);
468 	if (IS_ERR(fg->battery)) {
469 		ret = PTR_ERR(fg->battery);
473 	ver = da9150_fg_read_attr(fg, DA9150_QIF_FW_MAIN_VER,
485 		fg->interval = fg_pdata->update_interval;
490 			fg->warn_soc = fg_pdata->warn_soc_lvl;
496 			fg->crit_soc = fg_pdata->crit_soc_lvl;
502 	da9150_fg_soc_event_config(fg);
508 	if (fg->interval) {
509 		ret = devm_delayed_work_autocancel(dev, &fg->work,
516 		schedule_delayed_work(&fg->work,
517 				      msecs_to_jiffies(fg->interval));
526 					IRQF_ONESHOT, "FG", fg);
537 	struct da9150_fg *fg = platform_get_drvdata(pdev);
543 	if (fg->interval)
544 		flush_delayed_work(&fg->work);