Lines Matching refs:pmu

86 	struct rockchip_pmu *pmu;
98 struct mutex mutex; /* mutex lock for pmu */
196 struct rockchip_pmu *pmu;
206 pmu = dmc_pmu;
213 mutex_lock(&pmu->mutex);
225 for (i = 0; i < pmu->genpd_data.num_domains; i++) {
226 genpd = pmu->genpd_data.domains[i];
231 dev_err(pmu->dev,
243 genpd = pmu->genpd_data.domains[i];
249 mutex_unlock(&pmu->mutex);
259 struct rockchip_pmu *pmu;
265 pmu = dmc_pmu;
266 for (i = 0; i < pmu->genpd_data.num_domains; i++) {
267 genpd = pmu->genpd_data.domains[i];
274 mutex_unlock(&pmu->mutex);
286 struct rockchip_pmu *pmu = pd->pmu;
290 regmap_read(pmu->regmap, pmu->info->idle_offset, &val);
294 static unsigned int rockchip_pmu_read_ack(struct rockchip_pmu *pmu)
298 regmap_read(pmu->regmap, pmu->info->ack_offset, &val);
307 struct rockchip_pmu *pmu = pd->pmu;
317 regmap_write(pmu->regmap, pmu->info->req_offset + pd_req_offset,
321 regmap_update_bits(pmu->regmap, pmu->info->req_offset + pd_req_offset,
328 ret = readx_poll_timeout_atomic(rockchip_pmu_read_ack, pmu, val,
332 dev_err(pmu->dev,
341 dev_err(pmu->dev,
401 struct rockchip_pmu *pmu = pd->pmu;
405 regmap_read(pmu->regmap, pmu->info->repair_status_offset, &val);
414 regmap_read(pmu->regmap, pmu->info->status_offset, &val);
422 struct rockchip_pmu *pmu = pd->pmu;
425 regmap_read(pmu->regmap,
426 pmu->info->mem_status_offset + pd->info->mem_offset, &val);
434 struct rockchip_pmu *pmu = pd->pmu;
437 regmap_read(pmu->regmap,
438 pmu->info->chain_status_offset + pd->info->mem_offset, &val);
446 struct rockchip_pmu *pmu = pd->pmu;
454 dev_err(pmu->dev,
462 regmap_write(pmu->regmap, pmu->info->mem_pwr_offset + pd->info->pwr_offset,
469 dev_err(pmu->dev,
475 regmap_write(pmu->regmap, pmu->info->mem_pwr_offset + pd->info->pwr_offset,
482 dev_err(pmu->dev,
494 struct rockchip_pmu *pmu = pd->pmu;
506 regmap_write(pmu->regmap, pmu->info->pwr_offset + pd_pwr_offset,
510 regmap_update_bits(pmu->regmap, pmu->info->pwr_offset + pd_pwr_offset,
520 dev_err(pmu->dev,
529 struct rockchip_pmu *pmu = pd->pmu;
532 mutex_lock(&pmu->mutex);
537 dev_err(pmu->dev, "failed to enable clocks\n");
538 mutex_unlock(&pmu->mutex);
561 mutex_unlock(&pmu->mutex);
617 static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
629 dev_err(pmu->dev,
635 if (id >= pmu->info->num_domains) {
636 dev_err(pmu->dev, "%pOFn: invalid domain id %d\n",
641 if (pmu->genpd_data.domains[id])
644 pd_info = &pmu->info->domain_info[id];
646 dev_err(pmu->dev, "%pOFn: undefined domain id %d\n",
651 pd = devm_kzalloc(pmu->dev, sizeof(*pd), GFP_KERNEL);
656 pd->pmu = pmu;
660 pd->clks = devm_kcalloc(pmu->dev, pd->num_clks,
665 dev_dbg(pmu->dev, "%pOFn: doesn't have clocks: %d\n",
674 dev_err(pmu->dev,
689 pd->qos_regmap = devm_kcalloc(pmu->dev, pd->num_qos,
698 pd->qos_save_regs[j] = devm_kcalloc(pmu->dev,
739 pmu->genpd_data.domains[id] = &pd->genpd;
759 dev_err(pd->pmu->dev, "failed to remove domain '%s' : %d - state may be inconsistent\n",
766 mutex_lock(&pd->pmu->mutex);
768 mutex_unlock(&pd->pmu->mutex);
773 static void rockchip_pm_domain_cleanup(struct rockchip_pmu *pmu)
779 for (i = 0; i < pmu->genpd_data.num_domains; i++) {
780 genpd = pmu->genpd_data.domains[i];
790 static void rockchip_configure_pd_cnt(struct rockchip_pmu *pmu,
795 regmap_write(pmu->regmap, domain_reg_offset, count);
797 regmap_write(pmu->regmap, domain_reg_offset + 4, count);
800 static int rockchip_pm_add_subdomain(struct rockchip_pmu *pmu,
812 dev_err(pmu->dev,
817 parent_domain = pmu->genpd_data.domains[idx];
819 error = rockchip_pm_add_one_domain(pmu, np);
821 dev_err(pmu->dev, "failed to handle node %pOFn: %d\n",
828 dev_err(pmu->dev,
833 child_domain = pmu->genpd_data.domains[idx];
837 dev_err(pmu->dev, "%s failed to add subdomain %s: %d\n",
841 dev_dbg(pmu->dev, "%s add subdomain: %s\n",
845 rockchip_pm_add_subdomain(pmu, np);
861 struct rockchip_pmu *pmu;
872 pmu = devm_kzalloc(dev,
873 struct_size(pmu, domains, pmu_info->num_domains),
875 if (!pmu)
878 pmu->dev = &pdev->dev;
879 mutex_init(&pmu->mutex);
881 pmu->info = pmu_info;
883 pmu->genpd_data.domains = pmu->domains;
884 pmu->genpd_data.num_domains = pmu_info->num_domains;
892 pmu->regmap = syscon_node_to_regmap(parent->of_node);
893 if (IS_ERR(pmu->regmap)) {
895 return PTR_ERR(pmu->regmap);
903 rockchip_configure_pd_cnt(pmu, pmu_info->core_pwrcnt_offset,
906 rockchip_configure_pd_cnt(pmu, pmu_info->gpu_pwrcnt_offset,
918 error = rockchip_pm_add_one_domain(pmu, node);
926 error = rockchip_pm_add_subdomain(pmu, node);
940 error = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
948 dmc_pmu = pmu;
955 rockchip_pm_domain_cleanup(pmu);