pmdomain/mediatek/mtk-pm-domains.c

124 						    const struct scpsys_bus_prot_data *bpd)
126 	if (bpd->flags & BUS_PROT_COMPONENT_SMI)
133 							const struct scpsys_bus_prot_data *bpd)
135 	if (bpd->flags & BUS_PROT_STA_COMPONENT_INFRA_NAO)
138 		return scpsys_bus_protect_get_regmap(pd, bpd);
142 				    const struct scpsys_bus_prot_data *bpd)
144 	struct regmap *sta_regmap = scpsys_bus_protect_get_sta_regmap(pd, bpd);
145 	struct regmap *regmap = scpsys_bus_protect_get_regmap(pd, bpd);
146 	u32 sta_mask = bpd->bus_prot_sta_mask;
150 	expected_ack = (bpd->flags & BUS_PROT_STA_COMPONENT_INFRA_NAO ? sta_mask : 0);
152 	if (bpd->flags & BUS_PROT_REG_UPDATE)
153 		regmap_clear_bits(regmap, bpd->bus_prot_clr, bpd->bus_prot_set_clr_mask);
155 		regmap_write(regmap, bpd->bus_prot_clr, bpd->bus_prot_set_clr_mask);
157 	if (bpd->flags & BUS_PROT_IGNORE_CLR_ACK)
160 	return regmap_read_poll_timeout(sta_regmap, bpd->bus_prot_sta,
166 				  const struct scpsys_bus_prot_data *bpd)
168 	struct regmap *sta_regmap = scpsys_bus_protect_get_sta_regmap(pd, bpd);
169 	struct regmap *regmap = scpsys_bus_protect_get_regmap(pd, bpd);
170 	u32 sta_mask = bpd->bus_prot_sta_mask;
173 	if (bpd->flags & BUS_PROT_REG_UPDATE)
174 		regmap_set_bits(regmap, bpd->bus_prot_set, bpd->bus_prot_set_clr_mask);
176 		regmap_write(regmap, bpd->bus_prot_set, bpd->bus_prot_set_clr_mask);
178 	return regmap_read_poll_timeout(sta_regmap, bpd->bus_prot_sta,
186 		const struct scpsys_bus_prot_data *bpd = &pd->data->bp_cfg[i];
189 		if (!bpd->bus_prot_set_clr_mask)
192 		if (bpd->flags & BUS_PROT_INVERTED)
193 			ret = scpsys_bus_protect_clear(pd, bpd);
195 			ret = scpsys_bus_protect_set(pd, bpd);
206 		const struct scpsys_bus_prot_data *bpd = &pd->data->bp_cfg[i];
209 		if (!bpd->bus_prot_set_clr_mask)
212 		if (bpd->flags & BUS_PROT_INVERTED)
213 			ret = scpsys_bus_protect_set(pd, bpd);
215 			ret = scpsys_bus_protect_clear(pd, bpd);