Lines Matching defs:val
165 static inline void amd_pmf_reg_write(struct amd_pmf_dev *dev, int reg_offset, u32 val)
167 iowrite32(val, dev->regbase + reg_offset);
187 u32 val;
193 val, val != 0, PMF_MSG_DELAY_MIN_US,
211 val, val != 0, PMF_MSG_DELAY_MIN_US,
218 switch (val) {
227 dev_err(dev->dev, "SMU not ready. err: 0x%x\n", val);
231 dev_err(dev->dev, "SMU cmd unknown. err: 0x%x\n", val);
237 dev_err(dev->dev, "SMU cmd failed. err: 0x%x\n", val);
397 u32 val;
421 err = amd_smn_read(0, AMD_PMF_BASE_ADDR_LO, &val);
428 base_addr_lo = val & AMD_PMF_BASE_ADDR_HI_MASK;
430 err = amd_smn_read(0, AMD_PMF_BASE_ADDR_HI, &val);
437 base_addr_hi = val & AMD_PMF_BASE_ADDR_LO_MASK;