Lines Matching refs:_PIN
256 #define _PIN(offset) (NUM_GPIOS + (offset))
258 #define TEGRA_PIN_CRT_HSYNC _PIN(30)
259 #define TEGRA_PIN_CRT_VSYNC _PIN(31)
260 #define TEGRA_PIN_DDC_SCL _PIN(32)
261 #define TEGRA_PIN_DDC_SDA _PIN(33)
262 #define TEGRA_PIN_OWC _PIN(34)
263 #define TEGRA_PIN_CORE_PWR_REQ _PIN(35)
264 #define TEGRA_PIN_CPU_PWR_REQ _PIN(36)
265 #define TEGRA_PIN_PWR_INT_N _PIN(37)
266 #define TEGRA_PIN_CLK_32_K_IN _PIN(38)
267 #define TEGRA_PIN_DDR_COMP_PD _PIN(39)
268 #define TEGRA_PIN_DDR_COMP_PU _PIN(40)
269 #define TEGRA_PIN_DDR_A0 _PIN(41)
270 #define TEGRA_PIN_DDR_A1 _PIN(42)
271 #define TEGRA_PIN_DDR_A2 _PIN(43)
272 #define TEGRA_PIN_DDR_A3 _PIN(44)
273 #define TEGRA_PIN_DDR_A4 _PIN(45)
274 #define TEGRA_PIN_DDR_A5 _PIN(46)
275 #define TEGRA_PIN_DDR_A6 _PIN(47)
276 #define TEGRA_PIN_DDR_A7 _PIN(48)
277 #define TEGRA_PIN_DDR_A8 _PIN(49)
278 #define TEGRA_PIN_DDR_A9 _PIN(50)
279 #define TEGRA_PIN_DDR_A10 _PIN(51)
280 #define TEGRA_PIN_DDR_A11 _PIN(52)
281 #define TEGRA_PIN_DDR_A12 _PIN(53)
282 #define TEGRA_PIN_DDR_A13 _PIN(54)
283 #define TEGRA_PIN_DDR_A14 _PIN(55)
284 #define TEGRA_PIN_DDR_CAS_N _PIN(56)
285 #define TEGRA_PIN_DDR_BA0 _PIN(57)
286 #define TEGRA_PIN_DDR_BA1 _PIN(58)
287 #define TEGRA_PIN_DDR_BA2 _PIN(59)
288 #define TEGRA_PIN_DDR_DQS0P _PIN(60)
289 #define TEGRA_PIN_DDR_DQS0N _PIN(61)
290 #define TEGRA_PIN_DDR_DQS1P _PIN(62)
291 #define TEGRA_PIN_DDR_DQS1N _PIN(63)
292 #define TEGRA_PIN_DDR_DQS2P _PIN(64)
293 #define TEGRA_PIN_DDR_DQS2N _PIN(65)
294 #define TEGRA_PIN_DDR_DQS3P _PIN(66)
295 #define TEGRA_PIN_DDR_DQS3N _PIN(67)
296 #define TEGRA_PIN_DDR_CKE0 _PIN(68)
297 #define TEGRA_PIN_DDR_CKE1 _PIN(69)
298 #define TEGRA_PIN_DDR_CLK _PIN(70)
299 #define TEGRA_PIN_DDR_CLK_N _PIN(71)
300 #define TEGRA_PIN_DDR_DM0 _PIN(72)
301 #define TEGRA_PIN_DDR_DM1 _PIN(73)
302 #define TEGRA_PIN_DDR_DM2 _PIN(74)
303 #define TEGRA_PIN_DDR_DM3 _PIN(75)
304 #define TEGRA_PIN_DDR_ODT _PIN(76)
305 #define TEGRA_PIN_DDR_QUSE0 _PIN(77)
306 #define TEGRA_PIN_DDR_QUSE1 _PIN(78)
307 #define TEGRA_PIN_DDR_QUSE2 _PIN(79)
308 #define TEGRA_PIN_DDR_QUSE3 _PIN(80)
309 #define TEGRA_PIN_DDR_RAS_N _PIN(81)
310 #define TEGRA_PIN_DDR_WE_N _PIN(82)
311 #define TEGRA_PIN_DDR_DQ0 _PIN(83)
312 #define TEGRA_PIN_DDR_DQ1 _PIN(84)
313 #define TEGRA_PIN_DDR_DQ2 _PIN(85)
314 #define TEGRA_PIN_DDR_DQ3 _PIN(86)
315 #define TEGRA_PIN_DDR_DQ4 _PIN(87)
316 #define TEGRA_PIN_DDR_DQ5 _PIN(88)
317 #define TEGRA_PIN_DDR_DQ6 _PIN(89)
318 #define TEGRA_PIN_DDR_DQ7 _PIN(90)
319 #define TEGRA_PIN_DDR_DQ8 _PIN(91)
320 #define TEGRA_PIN_DDR_DQ9 _PIN(92)
321 #define TEGRA_PIN_DDR_DQ10 _PIN(93)
322 #define TEGRA_PIN_DDR_DQ11 _PIN(94)
323 #define TEGRA_PIN_DDR_DQ12 _PIN(95)
324 #define TEGRA_PIN_DDR_DQ13 _PIN(96)
325 #define TEGRA_PIN_DDR_DQ14 _PIN(97)
326 #define TEGRA_PIN_DDR_DQ15 _PIN(98)
327 #define TEGRA_PIN_DDR_DQ16 _PIN(99)
328 #define TEGRA_PIN_DDR_DQ17 _PIN(100)
329 #define TEGRA_PIN_DDR_DQ18 _PIN(101)
330 #define TEGRA_PIN_DDR_DQ19 _PIN(102)
331 #define TEGRA_PIN_DDR_DQ20 _PIN(103)
332 #define TEGRA_PIN_DDR_DQ21 _PIN(104)
333 #define TEGRA_PIN_DDR_DQ22 _PIN(105)
334 #define TEGRA_PIN_DDR_DQ23 _PIN(106)
335 #define TEGRA_PIN_DDR_DQ24 _PIN(107)
336 #define TEGRA_PIN_DDR_DQ25 _PIN(108)
337 #define TEGRA_PIN_DDR_DQ26 _PIN(109)
338 #define TEGRA_PIN_DDR_DQ27 _PIN(110)
339 #define TEGRA_PIN_DDR_DQ28 _PIN(111)
340 #define TEGRA_PIN_DDR_DQ29 _PIN(112)
341 #define TEGRA_PIN_DDR_DQ30 _PIN(113)
342 #define TEGRA_PIN_DDR_DQ31 _PIN(114)
343 #define TEGRA_PIN_DDR_CS0_N _PIN(115)
344 #define TEGRA_PIN_DDR_CS1_N _PIN(116)
345 #define TEGRA_PIN_SYS_RESET _PIN(117)
346 #define TEGRA_PIN_JTAG_TRST_N _PIN(118)
347 #define TEGRA_PIN_JTAG_TDO _PIN(119)
348 #define TEGRA_PIN_JTAG_TMS _PIN(120)
349 #define TEGRA_PIN_JTAG_TCK _PIN(121)
350 #define TEGRA_PIN_JTAG_TDI _PIN(122)
351 #define TEGRA_PIN_TEST_MODE_EN _PIN(123)