Lines Matching refs:GRP_MUX
75 #define GRP_MUX(a, m, p) \
182 GRP_MUX("exin0", EXIN, ase_pins_exin0),
183 GRP_MUX("exin1", EXIN, ase_pins_exin1),
184 GRP_MUX("exin2", EXIN, ase_pins_exin2),
185 GRP_MUX("jtag", JTAG, ase_pins_jtag),
186 GRP_MUX("spi", SPI, ase_pins_spi), /* DEPRECATED */
187 GRP_MUX("spi_di", SPI, ase_pins_spi_di),
188 GRP_MUX("spi_do", SPI, ase_pins_spi_do),
189 GRP_MUX("spi_clk", SPI, ase_pins_spi_clk),
190 GRP_MUX("spi_cs1", SPI, ase_pins_spi_cs1),
191 GRP_MUX("spi_cs2", SPI, ase_pins_spi_cs2),
192 GRP_MUX("spi_cs3", SPI, ase_pins_spi_cs3),
193 GRP_MUX("asc", ASC, ase_pins_asc),
194 GRP_MUX("stp", STP, ase_pins_stp),
195 GRP_MUX("gpt1", GPT, ase_pins_gpt1),
196 GRP_MUX("gpt2", GPT, ase_pins_gpt2),
197 GRP_MUX("gpt3", GPT, ase_pins_gpt3),
198 GRP_MUX("clkout0", CGU, ase_pins_clkout0),
199 GRP_MUX("clkout1", CGU, ase_pins_clkout1),
200 GRP_MUX("clkout2", CGU, ase_pins_clkout2),
201 GRP_MUX("mdio", MDIO, ase_pins_mdio),
202 GRP_MUX("dfe led0", DFE, ase_pins_dfe_led0),
203 GRP_MUX("dfe led1", DFE, ase_pins_dfe_led1),
204 GRP_MUX("ephy led0", EPHY, ase_pins_ephy_led0),
205 GRP_MUX("ephy led1", EPHY, ase_pins_ephy_led1),
206 GRP_MUX("ephy led2", EPHY, ase_pins_ephy_led2),
331 GRP_MUX("exin0", EXIN, danube_pins_exin0),
332 GRP_MUX("exin1", EXIN, danube_pins_exin1),
333 GRP_MUX("exin2", EXIN, danube_pins_exin2),
334 GRP_MUX("jtag", JTAG, danube_pins_jtag),
335 GRP_MUX("ebu a23", EBU, danube_pins_ebu_a23),
336 GRP_MUX("ebu a24", EBU, danube_pins_ebu_a24),
337 GRP_MUX("ebu a25", EBU, danube_pins_ebu_a25),
338 GRP_MUX("ebu clk", EBU, danube_pins_ebu_clk),
339 GRP_MUX("ebu cs1", EBU, danube_pins_ebu_cs1),
340 GRP_MUX("ebu wait", EBU, danube_pins_ebu_wait),
341 GRP_MUX("nand ale", EBU, danube_pins_nand_ale),
342 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1),
343 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
344 GRP_MUX("spi", SPI, danube_pins_spi), /* DEPRECATED */
345 GRP_MUX("spi_di", SPI, danube_pins_spi_di),
346 GRP_MUX("spi_do", SPI, danube_pins_spi_do),
347 GRP_MUX("spi_clk", SPI, danube_pins_spi_clk),
348 GRP_MUX("spi_cs1", SPI, danube_pins_spi_cs1),
349 GRP_MUX("spi_cs2", SPI, danube_pins_spi_cs2),
350 GRP_MUX("spi_cs3", SPI, danube_pins_spi_cs3),
351 GRP_MUX("spi_cs4", SPI, danube_pins_spi_cs4),
352 GRP_MUX("spi_cs5", SPI, danube_pins_spi_cs5),
353 GRP_MUX("spi_cs6", SPI, danube_pins_spi_cs6),
354 GRP_MUX("asc0", ASC, danube_pins_asc0),
355 GRP_MUX("asc0 cts rts", ASC, danube_pins_asc0_cts_rts),
356 GRP_MUX("stp", STP, danube_pins_stp),
357 GRP_MUX("nmi", NMI, danube_pins_nmi),
358 GRP_MUX("gpt1", GPT, danube_pins_gpt1),
359 GRP_MUX("gpt2", GPT, danube_pins_gpt2),
360 GRP_MUX("gpt3", GPT, danube_pins_gpt3),
361 GRP_MUX("clkout0", CGU, danube_pins_clkout0),
362 GRP_MUX("clkout1", CGU, danube_pins_clkout1),
363 GRP_MUX("clkout2", CGU, danube_pins_clkout2),
364 GRP_MUX("clkout3", CGU, danube_pins_clkout3),
365 GRP_MUX("gnt1", PCI, danube_pins_pci_gnt1),
366 GRP_MUX("gnt2", PCI, danube_pins_pci_gnt2),
367 GRP_MUX("gnt3", PCI, danube_pins_pci_gnt3),
368 GRP_MUX("req1", PCI, danube_pins_pci_req1),
369 GRP_MUX("req2", PCI, danube_pins_pci_req2),
370 GRP_MUX("req3", PCI, danube_pins_pci_req3),
371 GRP_MUX("dfe led0", DFE, danube_pins_dfe_led0),
372 GRP_MUX("dfe led1", DFE, danube_pins_dfe_led1),
536 GRP_MUX("exin0", EXIN, xrx100_pins_exin0),
537 GRP_MUX("exin1", EXIN, xrx100_pins_exin1),
538 GRP_MUX("exin2", EXIN, xrx100_pins_exin2),
539 GRP_MUX("exin3", EXIN, xrx100_pins_exin3),
540 GRP_MUX("exin4", EXIN, xrx100_pins_exin4),
541 GRP_MUX("exin5", EXIN, xrx100_pins_exin5),
542 GRP_MUX("ebu a23", EBU, xrx100_pins_ebu_a23),
543 GRP_MUX("ebu a24", EBU, xrx100_pins_ebu_a24),
544 GRP_MUX("ebu a25", EBU, xrx100_pins_ebu_a25),
545 GRP_MUX("ebu clk", EBU, xrx100_pins_ebu_clk),
546 GRP_MUX("ebu cs1", EBU, xrx100_pins_ebu_cs1),
547 GRP_MUX("ebu wait", EBU, xrx100_pins_ebu_wait),
548 GRP_MUX("nand ale", EBU, xrx100_pins_nand_ale),
549 GRP_MUX("nand cs1", EBU, xrx100_pins_nand_cs1),
550 GRP_MUX("nand cle", EBU, xrx100_pins_nand_cle),
551 GRP_MUX("nand rdy", EBU, xrx100_pins_nand_rdy),
552 GRP_MUX("nand rd", EBU, xrx100_pins_nand_rd),
553 GRP_MUX("spi_di", SPI, xrx100_pins_spi_di),
554 GRP_MUX("spi_do", SPI, xrx100_pins_spi_do),
555 GRP_MUX("spi_clk", SPI, xrx100_pins_spi_clk),
556 GRP_MUX("spi_cs1", SPI, xrx100_pins_spi_cs1),
557 GRP_MUX("spi_cs2", SPI, xrx100_pins_spi_cs2),
558 GRP_MUX("spi_cs3", SPI, xrx100_pins_spi_cs3),
559 GRP_MUX("spi_cs4", SPI, xrx100_pins_spi_cs4),
560 GRP_MUX("spi_cs5", SPI, xrx100_pins_spi_cs5),
561 GRP_MUX("spi_cs6", SPI, xrx100_pins_spi_cs6),
562 GRP_MUX("asc0", ASC, xrx100_pins_asc0),
563 GRP_MUX("asc0 cts rts", ASC, xrx100_pins_asc0_cts_rts),
564 GRP_MUX("stp", STP, xrx100_pins_stp),
565 GRP_MUX("nmi", NMI, xrx100_pins_nmi),
566 GRP_MUX("gpt1", GPT, xrx100_pins_gpt1),
567 GRP_MUX("gpt2", GPT, xrx100_pins_gpt2),
568 GRP_MUX("gpt3", GPT, xrx100_pins_gpt3),
569 GRP_MUX("clkout0", CGU, xrx100_pins_clkout0),
570 GRP_MUX("clkout1", CGU, xrx100_pins_clkout1),
571 GRP_MUX("clkout2", CGU, xrx100_pins_clkout2),
572 GRP_MUX("clkout3", CGU, xrx100_pins_clkout3),
573 GRP_MUX("gnt1", PCI, xrx100_pins_pci_gnt1),
574 GRP_MUX("gnt2", PCI, xrx100_pins_pci_gnt2),
575 GRP_MUX("gnt3", PCI, xrx100_pins_pci_gnt3),
576 GRP_MUX("gnt4", PCI, xrx100_pins_pci_gnt4),
577 GRP_MUX("req1", PCI, xrx100_pins_pci_req1),
578 GRP_MUX("req2", PCI, xrx100_pins_pci_req2),
579 GRP_MUX("req3", PCI, xrx100_pins_pci_req3),
580 GRP_MUX("req4", PCI, xrx100_pins_pci_req4),
581 GRP_MUX("mdio", MDIO, xrx100_pins_mdio),
582 GRP_MUX("dfe led0", DFE, xrx100_pins_dfe_led0),
583 GRP_MUX("dfe led1", DFE, xrx100_pins_dfe_led1),
764 GRP_MUX("exin0", EXIN, xrx200_pins_exin0),
765 GRP_MUX("exin1", EXIN, xrx200_pins_exin1),
766 GRP_MUX("exin2", EXIN, xrx200_pins_exin2),
767 GRP_MUX("exin3", EXIN, xrx200_pins_exin3),
768 GRP_MUX("exin4", EXIN, xrx200_pins_exin4),
769 GRP_MUX("exin5", EXIN, xrx200_pins_exin5),
770 GRP_MUX("ebu a23", EBU, xrx200_pins_ebu_a23),
771 GRP_MUX("ebu a24", EBU, xrx200_pins_ebu_a24),
772 GRP_MUX("ebu a25", EBU, xrx200_pins_ebu_a25),
773 GRP_MUX("ebu clk", EBU, xrx200_pins_ebu_clk),
774 GRP_MUX("ebu cs1", EBU, xrx200_pins_ebu_cs1),
775 GRP_MUX("ebu wait", EBU, xrx200_pins_ebu_wait),
776 GRP_MUX("nand ale", EBU, xrx200_pins_nand_ale),
777 GRP_MUX("nand cs1", EBU, xrx200_pins_nand_cs1),
778 GRP_MUX("nand cle", EBU, xrx200_pins_nand_cle),
779 GRP_MUX("nand rdy", EBU, xrx200_pins_nand_rdy),
780 GRP_MUX("nand rd", EBU, xrx200_pins_nand_rd),
781 GRP_MUX("spi_di", SPI, xrx200_pins_spi_di),
782 GRP_MUX("spi_do", SPI, xrx200_pins_spi_do),
783 GRP_MUX("spi_clk", SPI, xrx200_pins_spi_clk),
784 GRP_MUX("spi_cs1", SPI, xrx200_pins_spi_cs1),
785 GRP_MUX("spi_cs2", SPI, xrx200_pins_spi_cs2),
786 GRP_MUX("spi_cs3", SPI, xrx200_pins_spi_cs3),
787 GRP_MUX("spi_cs4", SPI, xrx200_pins_spi_cs4),
788 GRP_MUX("spi_cs5", SPI, xrx200_pins_spi_cs5),
789 GRP_MUX("spi_cs6", SPI, xrx200_pins_spi_cs6),
790 GRP_MUX("usif uart_rx", USIF, xrx200_pins_usif_uart_rx),
791 GRP_MUX("usif uart_tx", USIF, xrx200_pins_usif_uart_tx),
792 GRP_MUX("usif uart_rts", USIF, xrx200_pins_usif_uart_rts),
793 GRP_MUX("usif uart_cts", USIF, xrx200_pins_usif_uart_cts),
794 GRP_MUX("usif uart_dtr", USIF, xrx200_pins_usif_uart_dtr),
795 GRP_MUX("usif uart_dsr", USIF, xrx200_pins_usif_uart_dsr),
796 GRP_MUX("usif uart_dcd", USIF, xrx200_pins_usif_uart_dcd),
797 GRP_MUX("usif uart_ri", USIF, xrx200_pins_usif_uart_ri),
798 GRP_MUX("usif spi_di", USIF, xrx200_pins_usif_spi_di),
799 GRP_MUX("usif spi_do", USIF, xrx200_pins_usif_spi_do),
800 GRP_MUX("usif spi_clk", USIF, xrx200_pins_usif_spi_clk),
801 GRP_MUX("usif spi_cs0", USIF, xrx200_pins_usif_spi_cs0),
802 GRP_MUX("usif spi_cs1", USIF, xrx200_pins_usif_spi_cs1),
803 GRP_MUX("usif spi_cs2", USIF, xrx200_pins_usif_spi_cs2),
804 GRP_MUX("stp", STP, xrx200_pins_stp),
805 GRP_MUX("nmi", NMI, xrx200_pins_nmi),
806 GRP_MUX("gpt1", GPT, xrx200_pins_gpt1),
807 GRP_MUX("gpt2", GPT, xrx200_pins_gpt2),
808 GRP_MUX("gpt3", GPT, xrx200_pins_gpt3),
809 GRP_MUX("clkout0", CGU, xrx200_pins_clkout0),
810 GRP_MUX("clkout1", CGU, xrx200_pins_clkout1),
811 GRP_MUX("clkout2", CGU, xrx200_pins_clkout2),
812 GRP_MUX("clkout3", CGU, xrx200_pins_clkout3),
813 GRP_MUX("gnt1", PCI, xrx200_pins_pci_gnt1),
814 GRP_MUX("gnt2", PCI, xrx200_pins_pci_gnt2),
815 GRP_MUX("gnt3", PCI, xrx200_pins_pci_gnt3),
816 GRP_MUX("gnt4", PCI, xrx200_pins_pci_gnt4),
817 GRP_MUX("req1", PCI, xrx200_pins_pci_req1),
818 GRP_MUX("req2", PCI, xrx200_pins_pci_req2),
819 GRP_MUX("req3", PCI, xrx200_pins_pci_req3),
820 GRP_MUX("req4", PCI, xrx200_pins_pci_req4),
821 GRP_MUX("mdio", MDIO, xrx200_pins_mdio),
822 GRP_MUX("dfe led0", DFE, xrx200_pins_dfe_led0),
823 GRP_MUX("dfe led1", DFE, xrx200_pins_dfe_led1),
824 GRP_MUX("gphy0 led0", GPHY, xrx200_pins_gphy0_led0),
825 GRP_MUX("gphy0 led1", GPHY, xrx200_pins_gphy0_led1),
826 GRP_MUX("gphy0 led2", GPHY, xrx200_pins_gphy0_led2),
827 GRP_MUX("gphy1 led0", GPHY, xrx200_pins_gphy1_led0),
828 GRP_MUX("gphy1 led1", GPHY, xrx200_pins_gphy1_led1),
829 GRP_MUX("gphy1 led2", GPHY, xrx200_pins_gphy1_led2),
1014 GRP_MUX("exin0", EXIN, xrx300_pins_exin0),
1015 GRP_MUX("exin1", EXIN, xrx300_pins_exin1),
1016 GRP_MUX("exin2", EXIN, xrx300_pins_exin2),
1017 GRP_MUX("exin4", EXIN, xrx300_pins_exin4),
1018 GRP_MUX("exin5", EXIN, xrx300_pins_exin5),
1019 GRP_MUX("nand ale", EBU, xrx300_pins_nand_ale),
1020 GRP_MUX("nand cs1", EBU, xrx300_pins_nand_cs1),
1021 GRP_MUX("nand cle", EBU, xrx300_pins_nand_cle),
1022 GRP_MUX("nand rdy", EBU, xrx300_pins_nand_rdy),
1023 GRP_MUX("nand rd", EBU, xrx300_pins_nand_rd),
1024 GRP_MUX("nand d1", EBU, xrx300_pins_nand_d1),
1025 GRP_MUX("nand d0", EBU, xrx300_pins_nand_d0),
1026 GRP_MUX("nand d2", EBU, xrx300_pins_nand_d2),
1027 GRP_MUX("nand d7", EBU, xrx300_pins_nand_d7),
1028 GRP_MUX("nand d6", EBU, xrx300_pins_nand_d6),
1029 GRP_MUX("nand d5", EBU, xrx300_pins_nand_d5),
1030 GRP_MUX("nand d4", EBU, xrx300_pins_nand_d4),
1031 GRP_MUX("nand d3", EBU, xrx300_pins_nand_d3),
1032 GRP_MUX("nand cs0", EBU, xrx300_pins_nand_cs0),
1033 GRP_MUX("nand wr", EBU, xrx300_pins_nand_wr),
1034 GRP_MUX("nand wp", EBU, xrx300_pins_nand_wp),
1035 GRP_MUX("nand se", EBU, xrx300_pins_nand_se),
1036 GRP_MUX("spi_di", SPI, xrx300_pins_spi_di),
1037 GRP_MUX("spi_do", SPI, xrx300_pins_spi_do),
1038 GRP_MUX("spi_clk", SPI, xrx300_pins_spi_clk),
1039 GRP_MUX("spi_cs1", SPI, xrx300_pins_spi_cs1),
1040 GRP_MUX("spi_cs4", SPI, xrx300_pins_spi_cs4),
1041 GRP_MUX("spi_cs6", SPI, xrx300_pins_spi_cs6),
1042 GRP_MUX("usif uart_rx", USIF, xrx300_pins_usif_uart_rx),
1043 GRP_MUX("usif uart_tx", USIF, xrx300_pins_usif_uart_tx),
1044 GRP_MUX("usif spi_di", USIF, xrx300_pins_usif_spi_di),
1045 GRP_MUX("usif spi_do", USIF, xrx300_pins_usif_spi_do),
1046 GRP_MUX("usif spi_clk", USIF, xrx300_pins_usif_spi_clk),
1047 GRP_MUX("usif spi_cs0", USIF, xrx300_pins_usif_spi_cs0),
1048 GRP_MUX("stp", STP, xrx300_pins_stp),
1049 GRP_MUX("clkout2", CGU, xrx300_pins_clkout2),
1050 GRP_MUX("mdio", MDIO, xrx300_pins_mdio),
1051 GRP_MUX("dfe led0", DFE, xrx300_pins_dfe_led0),
1052 GRP_MUX("dfe led1", DFE, xrx300_pins_dfe_led1),
1053 GRP_MUX("ephy0 led0", GPHY, xrx300_pins_ephy0_led0),
1054 GRP_MUX("ephy0 led1", GPHY, xrx300_pins_ephy0_led1),
1055 GRP_MUX("ephy1 led0", GPHY, xrx300_pins_ephy1_led0),
1056 GRP_MUX("ephy1 led1", GPHY, xrx300_pins_ephy1_led1),