drivers/pinctrl/pinctrl-stmfx.c

106 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
112 	ret = regmap_read(pctl->stmfx->map, reg, &value);
119 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
123 	regmap_write_bits(pctl->stmfx->map, reg + get_reg(offset),
129 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
135 	ret = regmap_read(pctl->stmfx->map, reg, &val);
150 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
154 	return regmap_write_bits(pctl->stmfx->map, reg, mask, 0);
160 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
166 	return regmap_write_bits(pctl->stmfx->map, reg, mask, mask);
169 static int stmfx_pinconf_get_pupd(struct stmfx_pinctrl *pctl,
176 	ret = regmap_read(pctl->stmfx->map, reg, &pupd);
183 static int stmfx_pinconf_set_pupd(struct stmfx_pinctrl *pctl,
189 	return regmap_write_bits(pctl->stmfx->map, reg, mask, pupd ? mask : 0);
192 static int stmfx_pinconf_get_type(struct stmfx_pinctrl *pctl,
199 	ret = regmap_read(pctl->stmfx->map, reg, &type);
206 static int stmfx_pinconf_set_type(struct stmfx_pinctrl *pctl,
212 	return regmap_write_bits(pctl->stmfx->map, reg, mask, type ? mask : 0);
218 	struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
228 	dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin);
238 	type = stmfx_pinconf_get_type(pctl, pin);
241 	pupd = stmfx_pinconf_get_pupd(pctl, pin);
270 		ret = stmfx_gpio_get(&pctl->gpio_chip, pin);
288 	struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
308 			ret = stmfx_pinconf_set_type(pctl, pin, 0);
313 			ret = stmfx_pinconf_set_type(pctl, pin, 1);
316 			ret = stmfx_pinconf_set_pupd(pctl, pin, 0);
321 			ret = stmfx_pinconf_set_type(pctl, pin, 1);
324 			ret = stmfx_pinconf_set_pupd(pctl, pin, 1);
329 			ret = stmfx_pinconf_set_type(pctl, pin, 1);
334 			ret = stmfx_gpio_direction_output(&pctl->gpio_chip,
350 	struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
358 	dir = stmfx_gpio_get_direction(&pctl->gpio_chip, offset);
361 	type = stmfx_pinconf_get_type(pctl, offset);
364 	pupd = stmfx_pinconf_get_pupd(pctl, offset);
367 	val = stmfx_gpio_get(&pctl->gpio_chip, offset);
424 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
428 	pctl->irq_gpi_src[reg] &= ~mask;
435 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
440 	pctl->irq_gpi_src[reg] |= mask;
446 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
454 		pctl->irq_gpi_evt[reg] |= mask;
457 		pctl->irq_gpi_evt[reg] &= ~mask;
462 		pctl->irq_gpi_type[reg] |= mask;
464 		pctl->irq_gpi_type[reg] &= ~mask;
474 		pctl->irq_toggle_edge[reg] |= mask;
476 		pctl->irq_toggle_edge[reg] &= mask;
484 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
486 	mutex_lock(&pctl->lock);
492 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
501 	if (pctl->irq_toggle_edge[reg] & mask) {
503 			pctl->irq_gpi_type[reg] &= ~mask;
505 			pctl->irq_gpi_type[reg] |= mask;
508 	regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT,
509 			  pctl->irq_gpi_evt, NR_GPIO_REGS);
510 	regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE,
511 			  pctl->irq_gpi_type, NR_GPIO_REGS);
512 	regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
513 			  pctl->irq_gpi_src, NR_GPIO_REGS);
515 	mutex_unlock(&pctl->lock);
537 static void stmfx_pinctrl_irq_toggle_trigger(struct stmfx_pinctrl *pctl,
544 	if (!(pctl->irq_toggle_edge[reg] & mask))
547 	val = stmfx_gpio_get(&pctl->gpio_chip, offset);
552 		pctl->irq_gpi_type[reg] &= mask;
553 		regmap_write_bits(pctl->stmfx->map,
558 		pctl->irq_gpi_type[reg] |= mask;
559 		regmap_write_bits(pctl->stmfx->map,
567 	struct stmfx_pinctrl *pctl = (struct stmfx_pinctrl *)dev_id;
568 	struct gpio_chip *gc = &pctl->gpio_chip;
574 	ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_IRQ_GPI_PENDING,
579 	regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
587 		stmfx_pinctrl_irq_toggle_trigger(pctl, n);
590 	regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
591 			  pctl->irq_gpi_src, NR_GPIO_REGS);
599 	struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
601 	seq_printf(p, dev_name(pctl->dev));
616 static int stmfx_pinctrl_gpio_function_enable(struct stmfx_pinctrl *pctl)
619 	struct pinctrl_dev *pctl_dev = pctl->pctl_dev;
622 	pctl->gpio_valid_mask = GENMASK(15, 0);
627 		pctl->gpio_valid_mask |= GENMASK(19, 16);
633 		pctl->gpio_valid_mask |= GENMASK(23, 20);
636 	return stmfx_function_enable(pctl->stmfx, func);
643 	struct stmfx_pinctrl *pctl;
647 	pctl = devm_kzalloc(stmfx->dev, sizeof(*pctl), GFP_KERNEL);
648 	if (!pctl)
651 	platform_set_drvdata(pdev, pctl);
653 	pctl->dev = &pdev->dev;
654 	pctl->stmfx = stmfx;
657 		dev_err(pctl->dev, "missing required gpio-ranges property\n");
665 	mutex_init(&pctl->lock);
668 	pctl->pctl_desc.name = "stmfx-pinctrl";
669 	pctl->pctl_desc.pctlops = &stmfx_pinctrl_ops;
670 	pctl->pctl_desc.confops = &stmfx_pinconf_ops;
671 	pctl->pctl_desc.pins = stmfx_pins;
672 	pctl->pctl_desc.npins = ARRAY_SIZE(stmfx_pins);
673 	pctl->pctl_desc.owner = THIS_MODULE;
674 	pctl->pctl_desc.link_consumers = true;
676 	ret = devm_pinctrl_register_and_init(pctl->dev, &pctl->pctl_desc,
677 					     pctl, &pctl->pctl_dev);
679 		dev_err(pctl->dev, "pinctrl registration failed\n");
683 	ret = pinctrl_enable(pctl->pctl_dev);
685 		dev_err(pctl->dev, "pinctrl enable failed\n");
690 	pctl->gpio_chip.label = "stmfx-gpio";
691 	pctl->gpio_chip.parent = pctl->dev;
692 	pctl->gpio_chip.get_direction = stmfx_gpio_get_direction;
693 	pctl->gpio_chip.direction_input = stmfx_gpio_direction_input;
694 	pctl->gpio_chip.direction_output = stmfx_gpio_direction_output;
695 	pctl->gpio_chip.get = stmfx_gpio_get;
696 	pctl->gpio_chip.set = stmfx_gpio_set;
697 	pctl->gpio_chip.set_config = gpiochip_generic_config;
698 	pctl->gpio_chip.base = -1;
699 	pctl->gpio_chip.ngpio = pctl->pctl_desc.npins;
700 	pctl->gpio_chip.can_sleep = true;
702 	girq = &pctl->gpio_chip.irq;
712 	ret = devm_gpiochip_add_data(pctl->dev, &pctl->gpio_chip, pctl);
714 		dev_err(pctl->dev, "gpio_chip registration failed\n");
718 	ret = stmfx_pinctrl_gpio_function_enable(pctl);
722 	ret = devm_request_threaded_irq(pctl->dev, irq, NULL,
725 					dev_name(pctl->dev), pctl);
727 		dev_err(pctl->dev, "cannot request irq%d\n", irq);
731 	dev_info(pctl->dev,
732 		 "%ld GPIOs available\n", hweight_long(pctl->gpio_valid_mask));
752 static int stmfx_pinctrl_backup_regs(struct stmfx_pinctrl *pctl)
756 	ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_STATE,
757 			       &pctl->bkp_gpio_state, NR_GPIO_REGS);
760 	ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_DIR,
761 			       &pctl->bkp_gpio_dir, NR_GPIO_REGS);
764 	ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_TYPE,
765 			       &pctl->bkp_gpio_type, NR_GPIO_REGS);
768 	ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_PUPD,
769 			       &pctl->bkp_gpio_pupd, NR_GPIO_REGS);
776 static int stmfx_pinctrl_restore_regs(struct stmfx_pinctrl *pctl)
780 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_DIR,
781 				pctl->bkp_gpio_dir, NR_GPIO_REGS);
784 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_TYPE,
785 				pctl->bkp_gpio_type, NR_GPIO_REGS);
788 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_PUPD,
789 				pctl->bkp_gpio_pupd, NR_GPIO_REGS);
792 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPO_SET,
793 				pctl->bkp_gpio_state, NR_GPIO_REGS);
796 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT,
797 				pctl->irq_gpi_evt, NR_GPIO_REGS);
800 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE,
801 				pctl->irq_gpi_type, NR_GPIO_REGS);
804 	ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
805 				pctl->irq_gpi_src, NR_GPIO_REGS);
814 	struct stmfx_pinctrl *pctl = dev_get_drvdata(dev);
817 	ret = stmfx_pinctrl_backup_regs(pctl);
819 		dev_err(pctl->dev, "registers backup failure\n");
828 	struct stmfx_pinctrl *pctl = dev_get_drvdata(dev);
831 	ret = stmfx_pinctrl_restore_regs(pctl);
833 		dev_err(pctl->dev, "registers restoration failure\n");