Lines Matching refs:iomux
51 * Encode variants of iomux registers into a type variable
66 .iomux = { \
79 .iomux = { \
92 .iomux = { \
113 .iomux = { \
132 .iomux = { \
157 .iomux = { \
173 .iomux = { \
197 .iomux = { \
1055 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1060 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
1063 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
1065 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
1071 mux_type = bank->iomux[iomux_num].type;
1072 reg = bank->iomux[iomux_num].offset;
1129 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1134 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
1172 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
1177 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
1179 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
1185 mux_type = bank->iomux[iomux_num].type;
1186 reg = bank->iomux[iomux_num].offset;
3216 /* calculate iomux and drv offsets */
3218 struct rockchip_iomux *iom = &bank->iomux[j];
3225 /* preset iomux offset value, set new start value */
3232 } else { /* set current iomux offset */
3249 dev_dbg(dev, "bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",
3253 * Increase offset according to iomux width.
3254 * 4bit iomux'es are spread over two registers.