Lines Matching refs:pctl
50 static struct regmap *mtk_get_regmap(struct mtk_pinctrl *pctl,
53 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end)
54 return pctl->regmap2;
55 return pctl->regmap1;
58 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin)
61 return ((pin >> pctl->devdata->mode_shf) & pctl->devdata->port_mask)
62 << pctl->devdata->port_shf;
71 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
73 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
74 bit = BIT(offset & pctl->devdata->mode_mask);
76 if (pctl->devdata->spec_dir_set)
77 pctl->devdata->spec_dir_set(®_addr, offset);
81 reg_addr = CLR_ADDR(reg_addr, pctl);
83 reg_addr = SET_ADDR(reg_addr, pctl);
85 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit);
93 struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
95 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dout_offset;
96 bit = BIT(offset & pctl->devdata->mode_mask);
99 reg_addr = SET_ADDR(reg_addr, pctl);
101 reg_addr = CLR_ADDR(reg_addr, pctl);
103 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit);
106 static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
116 if (!pctl->devdata->spec_ies_smt_set &&
117 pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT &&
121 if (!pctl->devdata->spec_ies_smt_set &&
122 pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT &&
130 if (pctl->devdata->spec_ies_smt_set) {
131 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
132 pctl->devdata, pin, value, arg);
136 offset = pctl->devdata->ies_offset;
138 offset = pctl->devdata->smt_offset;
140 bit = BIT(offset & pctl->devdata->mode_mask);
143 reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
145 reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
147 regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit);
195 struct mtk_pinctrl *pctl, unsigned long pin) {
198 for (i = 0; i < pctl->devdata->n_pin_drv_grps; i++) {
200 pctl->devdata->pin_drv_grp + i;
208 static int mtk_pconf_set_driving(struct mtk_pinctrl *pctl,
216 if (pin >= pctl->devdata->npins)
219 pin_drv = mtk_find_pin_drv_grp_by_pin(pctl, pin);
220 if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls)
223 drv_grp = pctl->devdata->grp_desc + pin_drv->grp;
232 return regmap_update_bits(mtk_get_regmap(pctl, pin),
301 static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl,
312 if (pctl->devdata->spec_pull_set) {
317 ret = pctl->devdata->spec_pull_set(mtk_get_regmap(pctl, pin),
318 pctl->devdata, pin, isup,
326 dev_err(pctl->dev, "invalid pull-up argument %d on pin %d .\n",
331 if (pctl->devdata->mt8365_set_clr_mode) {
332 bit = pin & pctl->devdata->mode_mask;
333 reg_pullen = mtk_get_port(pctl, pin) +
334 pctl->devdata->pullen_offset;
335 reg_pullsel = mtk_get_port(pctl, pin) +
336 pctl->devdata->pullsel_offset;
337 ret = pctl->devdata->mt8365_set_clr_mode(mtk_get_regmap(pctl, pin),
346 bit = BIT(pin & pctl->devdata->mode_mask);
348 reg_pullen = SET_ADDR(mtk_get_port(pctl, pin) +
349 pctl->devdata->pullen_offset, pctl);
351 reg_pullen = CLR_ADDR(mtk_get_port(pctl, pin) +
352 pctl->devdata->pullen_offset, pctl);
355 reg_pullsel = SET_ADDR(mtk_get_port(pctl, pin) +
356 pctl->devdata->pullsel_offset, pctl);
358 reg_pullsel = CLR_ADDR(mtk_get_port(pctl, pin) +
359 pctl->devdata->pullsel_offset, pctl);
361 regmap_write(mtk_get_regmap(pctl, pin), reg_pullen, bit);
362 regmap_write(mtk_get_regmap(pctl, pin), reg_pullsel, bit);
371 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
375 ret = mtk_pconf_set_pull_select(pctl, pin, false, false, arg);
378 ret = mtk_pconf_set_pull_select(pctl, pin, true, true, arg);
381 ret = mtk_pconf_set_pull_select(pctl, pin, true, false, arg);
385 ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param);
388 mtk_gpio_set(pctl->chip, pin, arg);
393 ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param);
396 ret = mtk_pconf_set_driving(pctl, pin, arg);
409 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
411 *config = pctl->groups[group].config;
419 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
420 struct mtk_pinctrl_group *g = &pctl->groups[group];
442 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *pctl, u32 pin)
446 for (i = 0; i < pctl->ngroups; i++) {
447 struct mtk_pinctrl_group *grp = pctl->groups + i;
457 struct mtk_pinctrl *pctl, u32 pin_num, u32 fnum)
459 const struct mtk_desc_pin *pin = pctl->devdata->pins + pin_num;
471 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *pctl,
476 for (i = 0; i < pctl->devdata->npins; i++) {
477 const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
496 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
509 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
511 dev_err(pctl->dev, "invalid function %d on pin %d .\n",
537 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
541 dev_err(pctl->dev, "missing pins property in node %pOFn .\n",
583 if (pin >= pctl->devdata->npins ||
585 dev_err(pctl->dev, "invalid pins value.\n");
590 grp = mtk_pctrl_find_group_by_pin(pctl, pin);
592 dev_err(pctl->dev, "unable to match pin %d to group\n",
598 err = mtk_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map,
647 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
649 return pctl->ngroups;
655 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
657 return pctl->groups[group].name;
665 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
667 *pins = (unsigned *)&pctl->groups[group].pin;
697 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
699 *groups = pctl->grp_names;
700 *num_groups = pctl->ngroups;
712 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
714 if (pctl->devdata->spec_pinmux_set)
715 pctl->devdata->spec_pinmux_set(mtk_get_regmap(pctl, pin),
718 reg_addr = ((pin / pctl->devdata->mode_per_reg) << pctl->devdata->port_shf)
719 + pctl->devdata->pinmux_offset;
722 bit = pin % pctl->devdata->mode_per_reg;
725 return regmap_update_bits(mtk_get_regmap(pctl, pin),
730 mtk_find_pin_by_eint_num(struct mtk_pinctrl *pctl, unsigned int eint_num)
735 for (i = 0; i < pctl->devdata->npins; i++) {
736 pin = pctl->devdata->pins + i;
750 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
751 struct mtk_pinctrl_group *g = pctl->groups + group;
753 ret = mtk_pctrl_is_function_valid(pctl, g->pin, function);
755 dev_err(pctl->dev, "invalid function %d on group %d .\n",
760 desc = mtk_pctrl_find_function_by_pin(pctl, g->pin, function);
767 static int mtk_pmx_find_gpio_mode(struct mtk_pinctrl *pctl,
770 const struct mtk_desc_pin *pin = pctl->devdata->pins + offset;
787 struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
789 muxval = mtk_pmx_find_gpio_mode(pctl, offset);
792 dev_err(pctl->dev, "invalid gpio pin %d.\n", offset);
797 mtk_pconf_set_ies_smt(pctl, offset, 1, PIN_CONFIG_INPUT_ENABLE);
824 struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
826 reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->dir_offset;
827 bit = BIT(offset & pctl->devdata->mode_mask);
829 if (pctl->devdata->spec_dir_set)
830 pctl->devdata->spec_dir_set(®_addr, offset);
832 regmap_read(pctl->regmap1, reg_addr, &read_val);
844 struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
846 reg_addr = mtk_get_port(pctl, offset) +
847 pctl->devdata->din_offset;
849 bit = BIT(offset & pctl->devdata->mode_mask);
850 regmap_read(pctl->regmap1, reg_addr, &read_val);
856 struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
860 pin = pctl->devdata->pins + offset;
866 return mtk_eint_find_irq(pctl->eint, eint_n);
872 struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
880 pin = pctl->devdata->pins + offset;
887 return mtk_eint_set_debounce(pctl->eint, eint_n, debounce);
905 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
907 return mtk_eint_do_suspend(pctl->eint);
912 struct mtk_pinctrl *pctl = dev_get_drvdata(device);
914 return mtk_eint_do_resume(pctl->eint);
923 struct mtk_pinctrl *pctl = platform_get_drvdata(pdev);
926 pctl->ngroups = pctl->devdata->npins;
929 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups,
930 sizeof(*pctl->groups), GFP_KERNEL);
931 if (!pctl->groups)
935 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups,
936 sizeof(*pctl->grp_names), GFP_KERNEL);
937 if (!pctl->grp_names)
940 for (i = 0; i < pctl->devdata->npins; i++) {
941 const struct mtk_desc_pin *pin = pctl->devdata->pins + i;
942 struct mtk_pinctrl_group *group = pctl->groups + i;
947 pctl->grp_names[i] = pin->pin.name;
957 struct mtk_pinctrl *pctl = (struct mtk_pinctrl *)data;
960 pin = mtk_find_pin_by_eint_num(pctl, eint_n);
964 *gpio_chip = pctl->chip;
972 struct mtk_pinctrl *pctl = (struct mtk_pinctrl *)data;
975 pin = mtk_find_pin_by_eint_num(pctl, eint_n);
979 return mtk_gpio_get(pctl->chip, pin->pin.number);
984 struct mtk_pinctrl *pctl = (struct mtk_pinctrl *)data;
987 pin = mtk_find_pin_by_eint_num(pctl, eint_n);
992 mtk_pmx_set_mode(pctl->pctl_dev, pin->pin.number, pin->eint.eintmux);
994 mtk_pmx_gpio_set_direction(pctl->pctl_dev, NULL, pin->pin.number,
997 mtk_pconf_set_ies_smt(pctl, pin->pin.number, 1,
1009 static int mtk_eint_init(struct mtk_pinctrl *pctl, struct platform_device *pdev)
1016 pctl->eint = devm_kzalloc(pctl->dev, sizeof(*pctl->eint), GFP_KERNEL);
1017 if (!pctl->eint)
1020 pctl->eint->base = devm_platform_ioremap_resource(pdev, 0);
1021 if (IS_ERR(pctl->eint->base))
1022 return PTR_ERR(pctl->eint->base);
1024 pctl->eint->irq = irq_of_parse_and_map(np, 0);
1025 if (!pctl->eint->irq)
1028 pctl->eint->dev = &pdev->dev;
1030 * If pctl->eint->regs == NULL, it would fall back into using a generic
1033 pctl->eint->regs = pctl->devdata->eint_regs;
1034 pctl->eint->hw = &pctl->devdata->eint_hw;
1035 pctl->eint->pctl = pctl;
1036 pctl->eint->gpio_xlate = &mtk_eint_xt;
1038 return mtk_eint_do_init(pctl->eint);
1048 struct mtk_pinctrl *pctl;
1052 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
1053 if (!pctl)
1056 platform_set_drvdata(pdev, pctl);
1058 node = of_parse_phandle(np, "mediatek,pctl-regmap", 0);
1060 pctl->regmap1 = syscon_node_to_regmap(node);
1062 if (IS_ERR(pctl->regmap1))
1063 return PTR_ERR(pctl->regmap1);
1065 pctl->regmap1 = regmap;
1071 node = of_parse_phandle(np, "mediatek,pctl-regmap", 1);
1073 pctl->regmap2 = syscon_node_to_regmap(node);
1075 if (IS_ERR(pctl->regmap2))
1076 return PTR_ERR(pctl->regmap2);
1079 pctl->devdata = data;
1084 pins = devm_kcalloc(&pdev->dev, pctl->devdata->npins, sizeof(*pins),
1089 for (i = 0; i < pctl->devdata->npins; i++)
1090 pins[i] = pctl->devdata->pins[i].pin;
1092 pctl->pctl_desc.name = dev_name(&pdev->dev);
1093 pctl->pctl_desc.owner = THIS_MODULE;
1094 pctl->pctl_desc.pins = pins;
1095 pctl->pctl_desc.npins = pctl->devdata->npins;
1096 pctl->pctl_desc.confops = &mtk_pconf_ops;
1097 pctl->pctl_desc.pctlops = &mtk_pctrl_ops;
1098 pctl->pctl_desc.pmxops = &mtk_pmx_ops;
1099 pctl->dev = &pdev->dev;
1101 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc,
1102 pctl);
1103 if (IS_ERR(pctl->pctl_dev))
1104 return dev_err_probe(dev, PTR_ERR(pctl->pctl_dev),
1107 pctl->chip = devm_kzalloc(&pdev->dev, sizeof(*pctl->chip), GFP_KERNEL);
1108 if (!pctl->chip)
1111 *pctl->chip = mtk_gpio_chip;
1112 pctl->chip->ngpio = pctl->devdata->npins;
1113 pctl->chip->label = dev_name(&pdev->dev);
1114 pctl->chip->parent = &pdev->dev;
1115 pctl->chip->base = -1;
1117 ret = gpiochip_add_data(pctl->chip, pctl);
1122 ret = gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev),
1123 0, 0, pctl->devdata->npins);
1129 ret = mtk_eint_init(pctl, pdev);
1136 gpiochip_remove(pctl->chip);