pinctrl/intel/pinctrl-intel.c

216  * @PAD_UNLOCKED:	pad is fully controlled by the configuration registers
218  * @PAD_LOCKED_TX:	pad configuration TX state is locked
221  * Locking is considered as read-only mode for corresponding registers and
222  * their respective fields. That said, TX state bit is locked separately from
254 	 * the pad is considered unlocked. Any other case means that it is
496 	 * If pin is already configured in GPIO mode, we assume that
689 		case 1: /* Set default strength value in case none is given */
716 		case 1: /* Set default strength value in case none is given */
847  * @community: Community is filled here if not %NULL
848  * @padgrp: Pad group is filled here if not %NULL
850  * When coming through gpiolib irqchip, the GPIO offset is not
1026 		void __iomem *is;
1031 		is = community->regs + community->is_offset + gpp * 4;
1035 		writel(BIT(gpp_offset), is);
1049 		void __iomem *reg, *is;
1056 		is = community->regs + community->is_offset + gpp * 4;
1061 		writel(BIT(gpp_offset), is);
1103 	 * If the pin is in ACPI mode it is still usable as a GPIO but it
1185 		void __iomem *reg, *is;
1190 		is = community->regs + community->is_offset + gpp * 4;
1193 			pending = readl(is);
1231 		void __iomem *reg, *is;
1238 			is = community->regs + community->is_offset + gpp * 4;
1242 			writel(0xffff, is);
1546 		 * A value of all ones means the device is not present.
1698 	 * Only restore the pin if it is actually in use by the kernel (or
1699 	 * by userspace). It is possible that some pins are used by the
1711 	 * are being used or not. At the same time, there is a known bug