pinctrl/intel/pinctrl-cherryview.c

630 	u32 ctrl0, ctrl1;
633 		ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
637 	if (ctrl0 & CHV_PADCTRL0_GPIOEN) {
642 		mode = ctrl0 & CHV_PADCTRL0_PMODE_MASK;
648 	seq_printf(s, "0x%08x 0x%08x", ctrl0, ctrl1);
809 	u32 ctrl0;
813 	ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK;
815 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPI << CHV_PADCTRL0_GPIOCFG_SHIFT;
817 		ctrl0 |= CHV_PADCTRL0_GPIOCFG_GPO << CHV_PADCTRL0_GPIOCFG_SHIFT;
818 	chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
838 	u32 ctrl0, ctrl1;
843 		ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
847 	term = (ctrl0 & CHV_PADCTRL0_TERM_MASK) >> CHV_PADCTRL0_TERM_SHIFT;
856 		if (!(ctrl0 & CHV_PADCTRL0_TERM_UP))
874 		if (!term || (ctrl0 & CHV_PADCTRL0_TERM_UP))
891 		cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;
920 	u32 ctrl0, pull;
924 	ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0);
928 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);
932 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);
949 		ctrl0 |= CHV_PADCTRL0_TERM_UP | pull;
953 		ctrl0 &= ~(CHV_PADCTRL0_TERM_MASK | CHV_PADCTRL0_TERM_UP);
966 		ctrl0 |= pull;
973 	chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0);
1102 	u32 ctrl0, cfg;
1105 		ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1107 	cfg = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;
1111 		return !!(ctrl0 & CHV_PADCTRL0_GPIOTXSTATE);
1112 	return !!(ctrl0 & CHV_PADCTRL0_GPIORXSTATE);
1118 	u32 ctrl0;
1122 	ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1125 		ctrl0 |= CHV_PADCTRL0_GPIOTXSTATE;
1127 		ctrl0 &= ~CHV_PADCTRL0_GPIOTXSTATE;
1129 	chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0);
1135 	u32 ctrl0, direction;
1138 		ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0);
1140 	direction = ctrl0 & CHV_PADCTRL0_GPIOCFG_MASK;
1762 			dev_dbg(dev, "restored pin %2u ctrl0 0x%08x\n", desc->number,