phy/st/phy-miphy28lp.c

436 		struct miphy28lp_pll_gen *gen = &sata_pll_gen[i];
439 		writeb_relaxed(gen->bank, base + MIPHY_CONF);
440 		writeb_relaxed(gen->speed, base + MIPHY_SPEED);
441 		writeb_relaxed(gen->bias_boost_1, base + MIPHY_BIAS_BOOST_1);
442 		writeb_relaxed(gen->bias_boost_2, base + MIPHY_BIAS_BOOST_2);
445 		writeb_relaxed(gen->tx_ctrl_2, base + MIPHY_TX_CTRL_2);
446 		writeb_relaxed(gen->tx_ctrl_3, base + MIPHY_TX_CTRL_3);
449 		writeb_relaxed(gen->rx_buff_ctrl, base + MIPHY_RX_BUFFER_CTRL);
450 		writeb_relaxed(gen->rx_vga_gain, base + MIPHY_RX_VGA_GAIN);
451 		writeb_relaxed(gen->rx_equ_gain_1, base + MIPHY_RX_EQU_GAIN_1);
452 		writeb_relaxed(gen->rx_equ_gain_2, base + MIPHY_RX_EQU_GAIN_2);
453 		writeb_relaxed(gen->rx_equ_gain_3, base + MIPHY_RX_EQU_GAIN_3);
463 		struct miphy28lp_pll_gen *gen = &pcie_pll_gen[i];
466 		writeb_relaxed(gen->bank, base + MIPHY_CONF);
467 		writeb_relaxed(gen->speed, base + MIPHY_SPEED);
468 		writeb_relaxed(gen->bias_boost_1, base + MIPHY_BIAS_BOOST_1);
469 		writeb_relaxed(gen->bias_boost_2, base + MIPHY_BIAS_BOOST_2);
472 		writeb_relaxed(gen->tx_ctrl_1, base + MIPHY_TX_CTRL_1);
473 		writeb_relaxed(gen->tx_ctrl_2, base + MIPHY_TX_CTRL_2);
474 		writeb_relaxed(gen->tx_ctrl_3, base + MIPHY_TX_CTRL_3);
476 		writeb_relaxed(gen->rx_k_gain, base + MIPHY_RX_K_GAIN);
479 		writeb_relaxed(gen->rx_buff_ctrl, base + MIPHY_RX_BUFFER_CTRL);
480 		writeb_relaxed(gen->rx_vga_gain, base + MIPHY_RX_VGA_GAIN);
481 		writeb_relaxed(gen->rx_equ_gain_1, base + MIPHY_RX_EQU_GAIN_1);
482 		writeb_relaxed(gen->rx_equ_gain_2, base + MIPHY_RX_EQU_GAIN_2);
1157 	of_property_read_u32(np, "st,sata-gen", &miphy_phy->sata_gen);