Lines Matching defs:ctrl0
198 u32 ctrl0;
242 ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
244 ctrl0 &= ~EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK;
245 ctrl0 |= drv->ref_reg_val <<
249 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_PHYSWRST |
254 ctrl0 |= EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST |
257 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
259 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST |
261 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
324 u32 ctrl0;
339 ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
340 ctrl0 |= (EXYNOS_5250_HOSTPHYCTRL0_SIDDQ |
345 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);