Lines Matching refs:lane

505 static void tcphy_tx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
507 writel(0x7799, tcphy->base + TX_PSC_A0(lane));
508 writel(0x7798, tcphy->base + TX_PSC_A1(lane));
509 writel(0x5098, tcphy->base + TX_PSC_A2(lane));
510 writel(0x5098, tcphy->base + TX_PSC_A3(lane));
511 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
512 writel(0xbf, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
515 static void tcphy_rx_usb3_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
517 writel(0xa6fd, tcphy->base + RX_PSC_A0(lane));
518 writel(0xa6fd, tcphy->base + RX_PSC_A1(lane));
519 writel(0xa410, tcphy->base + RX_PSC_A2(lane));
520 writel(0x2410, tcphy->base + RX_PSC_A3(lane));
521 writel(0x23ff, tcphy->base + RX_PSC_CAL(lane));
522 writel(0x13, tcphy->base + RX_SIGDET_HL_FILT_TMR(lane));
523 writel(0x03e7, tcphy->base + RX_REE_CTRL_DATA_MASK(lane));
524 writel(0x1004, tcphy->base + RX_DIAG_SIGDET_TUNE(lane));
525 writel(0x2010, tcphy->base + RX_PSC_RDY(lane));
526 writel(0xfb, tcphy->base + XCVR_DIAG_BIDI_CTRL(lane));
529 static void tcphy_dp_cfg_lane(struct rockchip_typec_phy *tcphy, u32 lane)
533 writel(0xbefc, tcphy->base + XCVR_PSM_RCTRL(lane));
534 writel(0x6799, tcphy->base + TX_PSC_A0(lane));
535 writel(0x6798, tcphy->base + TX_PSC_A1(lane));
536 writel(0x98, tcphy->base + TX_PSC_A2(lane));
537 writel(0x98, tcphy->base + TX_PSC_A3(lane));
539 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_000(lane));
540 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_001(lane));
541 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_010(lane));
542 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_011(lane));
543 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_100(lane));
544 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_101(lane));
545 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_110(lane));
546 writel(0, tcphy->base + TX_TXCC_MGNFS_MULT_111(lane));
547 writel(0, tcphy->base + TX_TXCC_CPOST_MULT_10(lane));
548 writel(0, tcphy->base + TX_TXCC_CPOST_MULT_01(lane));
549 writel(0, tcphy->base + TX_TXCC_CPOST_MULT_00(lane));
550 writel(0, tcphy->base + TX_TXCC_CPOST_MULT_11(lane));
552 writel(0x128, tcphy->base + TX_TXCC_CAL_SCLR_MULT(lane));
553 writel(0x400, tcphy->base + TX_DIAG_TX_DRV(lane));
555 rdata = readl(tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));
557 writel(rdata, tcphy->base + XCVR_DIAG_PLLDRC_CTRL(lane));