Lines Matching refs:usb2_base

157 	void __iomem *usb2_base = ch->base;
158 u32 val = readl(usb2_base + USB2_COMMCTRL);
165 writel(val, usb2_base + USB2_COMMCTRL);
170 void __iomem *usb2_base = ch->base;
171 u32 val = readl(usb2_base + USB2_LINECTRL1);
179 writel(val, usb2_base + USB2_LINECTRL1);
184 void __iomem *usb2_base = ch->base;
195 val = readl(usb2_base + vbus_ctrl_reg);
200 writel(val, usb2_base + vbus_ctrl_reg);
205 void __iomem *usb2_base = ch->base;
206 u32 val = readl(usb2_base + USB2_OBINTEN);
212 writel(val, usb2_base + USB2_OBINTEN);
237 void __iomem *usb2_base = ch->base;
240 val = readl(usb2_base + USB2_LINECTRL1);
241 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
247 val = readl(usb2_base + USB2_LINECTRL1);
248 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
391 void __iomem *usb2_base = ch->base;
395 val = readl(usb2_base + USB2_LINECTRL1);
398 writel(val, usb2_base + USB2_LINECTRL1);
401 val = readl(usb2_base + USB2_VBCTRL);
403 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
404 val = readl(usb2_base + USB2_ADPCTRL);
405 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
409 writel(0xffffffff, usb2_base + USB2_OBINTSTA);
410 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
418 void __iomem *usb2_base = ch->base;
419 u32 status = readl(usb2_base + USB2_OBINTSTA);
424 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
436 void __iomem *usb2_base = channel->base;
451 val = readl(usb2_base + USB2_INT_ENABLE);
453 writel(val, usb2_base + USB2_INT_ENABLE);
454 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
455 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
473 void __iomem *usb2_base = channel->base;
481 val = readl(usb2_base + USB2_INT_ENABLE);
485 writel(val, usb2_base + USB2_INT_ENABLE);
497 void __iomem *usb2_base = channel->base;
511 val = readl(usb2_base + USB2_USBCTR);
513 writel(val, usb2_base + USB2_USBCTR);
515 writel(val, usb2_base + USB2_USBCTR);