Lines Matching refs:mmio
41 void __iomem *mmio;
62 void __iomem *mmio = phy->mmio;
65 mtk_phy_set_bits(mmio + MP_GLB_DIG_8C, PLL_PWR_ON);
66 mtk_phy_clear_bits(mmio + MP_GLB_DIG_8C, FRC_FRC_PWR_ON);
69 mtk_phy_clear_bits(mmio + MP_GLB_DIG_8C, PLL_ISO_EN);
70 mtk_phy_clear_bits(mmio + MP_GLB_DIG_8C, FRC_PLL_ISO_EN);
73 mtk_phy_set_bits(mmio + MP_LN_RX_44, CDR_PWR_ON);
74 mtk_phy_clear_bits(mmio + MP_LN_RX_44, FRC_CDR_PWR_ON);
77 mtk_phy_clear_bits(mmio + MP_LN_RX_44, CDR_ISO_EN);
78 mtk_phy_clear_bits(mmio + MP_LN_RX_44, FRC_CDR_ISO_EN);
81 mtk_phy_set_bits(mmio + MP_LN_DIG_RX_AC, RX_SQ_EN);
82 mtk_phy_clear_bits(mmio + MP_LN_DIG_RX_AC, FRC_RX_SQ_EN);
88 mtk_phy_clear_bits(mmio + MP_LN_DIG_RX_9C, FSM_DIFZ_FRC);
93 void __iomem *mmio = phy->mmio;
96 mtk_phy_set_bits(mmio + MP_LN_DIG_RX_9C, FSM_DIFZ_FRC);
99 mtk_phy_set_bits(mmio + MP_LN_DIG_RX_AC, FRC_RX_SQ_EN);
100 mtk_phy_clear_bits(mmio + MP_LN_DIG_RX_AC, RX_SQ_EN);
103 mtk_phy_set_bits(mmio + MP_LN_RX_44, FRC_CDR_ISO_EN);
104 mtk_phy_set_bits(mmio + MP_LN_RX_44, CDR_ISO_EN);
107 mtk_phy_set_bits(mmio + MP_LN_RX_44, FRC_CDR_PWR_ON);
108 mtk_phy_clear_bits(mmio + MP_LN_RX_44, CDR_PWR_ON);
111 mtk_phy_set_bits(mmio + MP_GLB_DIG_8C, FRC_PLL_ISO_EN);
112 mtk_phy_set_bits(mmio + MP_GLB_DIG_8C, PLL_ISO_EN);
115 mtk_phy_set_bits(mmio + MP_GLB_DIG_8C, FRC_FRC_PWR_ON);
116 mtk_phy_clear_bits(mmio + MP_GLB_DIG_8C, PLL_PWR_ON);
162 phy->mmio = devm_platform_ioremap_resource(pdev, 0);
163 if (IS_ERR(phy->mmio))
164 return PTR_ERR(phy->mmio);