Lines Matching refs:dev_err
94 dev_err(&phy->dev,
133 dev_err(&phy->dev, "failed to get PHY lock: %d\n", ret);
175 dev_err(&phy->dev, "failed to set PHY reference clock rate(%lu): %d\n",
193 dev_err(dev, "number bits mismatch(mst: %u vs slv: %u)\n",
201 dev_err(dev, "dclk rate mismatch(mst: %lu vs slv: %lu)\n",
208 dev_err(dev, "lanes mismatch(mst: %u vs slv: %u)\n",
214 dev_err(dev, "master PHY is not found\n");
230 dev_err(&phy->dev, "invalid PHY mode(%d)\n", mode);
236 dev_err(&phy->dev, "invalid bits per data lane(%u)\n",
242 dev_err(&phy->dev, "invalid data lanes(%u)\n", cfg->lanes);
248 dev_err(&phy->dev, "invalid differential clock rate(%lu)\n",
260 dev_err(&phy->dev, "failed to check slave PHY: %d\n", ret);
283 dev_err(dev, "failed to get PM runtime: %d\n", ret);
291 dev_err(dev, "failed to put PM runtime: %d\n", ret);
303 dev_err(dev,
312 dev_err(dev, "invalid PHY index(%d)\n", phy_id);
354 dev_err(dev, "failed to do POR reset: %d\n", ret);
368 dev_err(dev, "failed to create PHY for channel%d: %d\n",
383 dev_err(dev, "failed to register PHY provider: %d\n", ret);