perf/hisilicon/hns3_pmu.c

914 	struct hw_perf_event *hwc = &event->hw;
920 	HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_FUNC);
929 	struct hw_perf_event *hwc = &event->hw;
935 	if (!hns3_pmu_valid_queue(hns3_pmu, hwc->idx, bdf, queue_id)) {
940 	HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_FUNC_QUEUE);
1026 	struct hw_perf_event *hwc = &event->hw;
1036 		HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_GLOBAL);
1047 		HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_PORT);
1052 		HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_PORT_TC);
1057 		HNS3_PMU_SET_HW_FILTER(hwc, HNS3_PMU_HW_FILTER_FUNC_INTR);
1113 	struct hw_perf_event *hwc = &event->hw;
1120 	filter_mode = *(u8 *)hwc->addr_filters;
1144 	struct hw_perf_event *hwc = &event->hw;
1145 	u8 filter_mode = *(u8 *)hwc->addr_filters;
1147 	u32 idx = hwc->idx;
1164 				    struct hw_perf_event *hwc)
1166 	u32 idx = hwc->idx;
1175 				     struct hw_perf_event *hwc)
1177 	u32 idx = hwc->idx;
1186 				 struct hw_perf_event *hwc)
1188 	u32 idx = hwc->idx;
1197 				  struct hw_perf_event *hwc)
1199 	u32 idx = hwc->idx;
1238 	struct hw_perf_event *hwc = &event->hw;
1240 	local64_set(&hwc->prev_count, 0);
1247 	struct hw_perf_event *hwc = &event->hw;
1267 	hwc->idx = idx;
1281 		hwc->event_base = HNS3_PMU_REG_EVENT_EXT_COUNTER;
1283 		hwc->event_base = HNS3_PMU_REG_EVENT_COUNTER;
1290 	struct hw_perf_event *hwc = &event->hw;
1294 		prev_cnt = local64_read(&hwc->prev_count);
1296 	} while (local64_cmpxchg(&hwc->prev_count, prev_cnt, new_cnt) !=
1306 	struct hw_perf_event *hwc = &event->hw;
1308 	if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
1311 	WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
1312 	hwc->state = 0;
1316 	hns3_pmu_enable_intr(hns3_pmu, hwc);
1317 	hns3_pmu_enable_counter(hns3_pmu, hwc);
1325 	struct hw_perf_event *hwc = &event->hw;
1327 	hns3_pmu_disable_counter(hns3_pmu, hwc);
1328 	hns3_pmu_disable_intr(hns3_pmu, hwc);
1330 	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
1331 	hwc->state |= PERF_HES_STOPPED;
1333 	if (hwc->state & PERF_HES_UPTODATE)
1338 	hwc->state |= PERF_HES_UPTODATE;
1344 	struct hw_perf_event *hwc = &event->hw;
1347 	hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
1356 		hwc->idx = idx;
1364 	hwc->idx = idx;
1377 	struct hw_perf_event *hwc = &event->hw;
1380 	hns3_pmu->hw_events[hwc->idx] = NULL;