Lines Matching refs:event

93  * Per-event affinity table. Most events can be installed on counter
150 return sprintf(page, "event=0x%04llx\n", pmu_attr->id);
167 PMU_FORMAT_ATTR(event, "config:0-7");
296 static void m1_pmu_configure_counter(unsigned int index, u8 event,
331 * place the event at the expected location in the relevant
332 * register (PMESR0 holds the event configuration for counters
342 val |= (u64)event << shift;
349 val |= (u64)event << shift;
356 static void m1_pmu_enable_event(struct perf_event *event)
361 evt = event->hw.config_base & M1_PMU_CFG_EVENT;
362 user = event->hw.config_base & M1_PMU_CFG_COUNT_USER;
363 kernel = event->hw.config_base & M1_PMU_CFG_COUNT_KERNEL;
365 m1_pmu_disable_counter_interrupt(event->hw.idx);
366 m1_pmu_disable_counter(event->hw.idx);
369 m1_pmu_configure_counter(event->hw.idx, evt, user, kernel);
370 m1_pmu_enable_counter(event->hw.idx);
371 m1_pmu_enable_counter_interrupt(event->hw.idx);
375 static void m1_pmu_disable_event(struct perf_event *event)
377 m1_pmu_disable_counter_interrupt(event->hw.idx);
378 m1_pmu_disable_counter(event->hw.idx);
404 struct perf_event *event = cpuc->events[idx];
407 if (!event)
410 armpmu_event_update(event);
411 perf_sample_data_init(&data, 0, event->hw.last_period);
412 if (!armpmu_event_set_period(event))
415 if (perf_event_overflow(event, &data, regs))
416 m1_pmu_disable_event(event);
424 static u64 m1_pmu_read_counter(struct perf_event *event)
426 return m1_pmu_read_hw_counter(event->hw.idx);
429 static void m1_pmu_write_counter(struct perf_event *event, u64 value)
431 m1_pmu_write_hw_counter(value, event->hw.idx);
436 struct perf_event *event)
438 unsigned long evtype = event->hw.config_base & M1_PMU_CFG_EVENT;
443 * Place the event on the first free counter that can count
444 * this event.
459 struct perf_event *event)
461 clear_bit(event->hw.idx, cpuc->used_mask);
485 static int m1_pmu_map_event(struct perf_event *event)
492 event->hw.flags |= ARMPMU_EVT_47BIT;
493 return armpmu_map_event(event, &m1_pmu_perf_map, NULL, M1_PMU_CFG_EVENT);
496 static int m2_pmu_map_event(struct perf_event *event)
503 event->hw.flags |= ARMPMU_EVT_63BIT;
504 return armpmu_map_event(event, &m1_pmu_perf_map, NULL, M1_PMU_CFG_EVENT);
522 static int m1_pmu_set_event_filter(struct hw_perf_event *event,
536 event->config_base = config_base;