Lines Matching refs:cap
31 u32 *cap;
47 cap = &save_state->cap.data[0];
48 pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap);
55 u32 *cap;
63 cap = &save_state->cap.data[0];
64 pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap);
84 u32 *cap;
97 cap = &save_state->cap.data[0];
98 pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL2, cap++);
99 pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, cap++);
106 u32 *cap, pl_ctl1, pl_ctl2, pl_l1_2_enable;
126 cap = &cl_save_state->cap.data[0];
127 cl_ctl2 = *cap++;
128 cl_ctl1 = *cap;
129 cap = &pl_save_state->cap.data[0];
130 pl_ctl2 = *cap++;
131 pl_ctl1 = *cap;
307 u16 *cap, lnkctl, aspm_ctl;
323 /* Depends on pci_save_pcie_state(): cap[1] is LNKCTL */
324 cap = (u16 *)&save_state->cap.data[0];
325 cap[1] = lnkctl | aspm_ctl;
365 /* All functions should have the same cap and state, take the worst */
1153 u32 cap, ctl;
1158 pcie_capability_read_dword(pdev, PCI_EXP_DEVCAP2, &cap);
1159 if (!(cap & PCI_EXP_DEVCAP2_LTR))