pci/pcie/aer.c

5  * collects root port status and schedules work.
44 	u32 status;			/* PCI_ERR_ROOT_STATUS */
249 	u32 status, sev;
254 	/* Clear status bits for ERR_NONFATAL errors only */
255 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
257 	status &= ~sev;
258 	if (status)
259 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
268 	u32 status, sev;
273 	/* Clear status bits for ERR_FATAL errors only */
274 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
276 	status &= sev;
277 	if (status)
278 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
285  * Clearing AER error status registers unconditionally, regardless of
293 	u32 status;
302 		pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status);
303 		pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status);
306 	pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
307 	pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, status);
309 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
310 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
618 	unsigned long status = info->status & ~info->mask;
644 	for_each_set_bit(i, &status, max)
656 	if (e_src->status & PCI_ERR_ROOT_COR_RCV)
659 	if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
660 		if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
677 	unsigned long status = info->status & ~info->mask;
689 	for_each_set_bit(i, &status, 32) {
706 	if (!info->status) {
712 	layer = AER_GET_LAYER_ERROR(info->severity, info->status);
713 	agent = AER_GET_AGENT(info->severity, info->status);
721 	pci_printk(level, dev, "  device [%04x:%04x] error status/mask=%08x/%08x\n",
722 		   dev->vendor, dev->device, info->status, info->mask);
733 	trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask),
768 	u32 status, mask;
772 		status = aer->cor_status;
775 		status = aer->uncor_status;
777 		tlp_header_valid = status & AER_LOG_TLP_MASKS;
780 	layer = AER_GET_LAYER_ERROR(aer_severity, status);
781 	agent = AER_GET_AGENT(aer_severity, status);
785 	info.status = status;
789 	pci_err(dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask);
801 	trace_aer_event(dev_name(&dev->dev), (status & ~mask),
829 	u32 status, mask;
853 	 * We check AER status registers to find possible reporter.
868 		pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
871 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
874 	if (status & ~mask)
971 	 * The capability, status, and control fields in Device 0,
998 		return info->status & PCI_ERR_COR_INTERNAL;
1000 	return info->status & PCI_ERR_UNC_INTN;
1099 					info->status);
1154 		 * are present in the error status. Thus free the same after processing
1200  * aer_get_device_error_info - read error status from dev and store it to info
1215 	info->status = 0;
1224 			&info->status);
1227 		if (!(info->status & ~info->mask))
1236 			&info->status);
1239 		if (!(info->status & ~info->mask))
1246 		if (info->status & AER_LOG_TLP_MASKS) {
1287 	if (e_src->status & PCI_ERR_ROOT_COR_RCV) {
1291 		if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV)
1301 	if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
1304 		if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
1309 		if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV)
1357 	pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status);
1358 	if (!(e_src.status & AER_ERR_STATUS_MASK))
1362 	pci_write_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, e_src.status);
1413 	/* Clear error status */
1438 	/* Clear Root's error status reg */
1464 	int status;
1487 	status = devm_request_threaded_irq(device, dev->irq, aer_irq, aer_isr,
1489 	if (status) {
1491 		return status;