drivers/pci/pci-bridge-emul.c

29  * @ro:		Read-Only bits
40 	u32 ro;
51 	[PCI_VENDOR_ID / 4] = { .ro = ~0 },
56 		.ro = ((PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
63 	[PCI_CLASS_REVISION / 4] = { .ro = ~0 },
81 	[PCI_CACHE_LINE_SIZE / 4] = { .ro = ~0 },
87 	[PCI_BASE_ADDRESS_0 / 4] = { .ro = ~0 },
88 	[PCI_BASE_ADDRESS_1 / 4] = { .ro = ~0 },
94 		.ro = GENMASK(31, 24),
102 		.ro = (((PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
114 		.ro = GENMASK(19, 16) | GENMASK(3, 0),
122 		.ro = GENMASK(19, 16) | GENMASK(3, 0),
138 		.ro = GENMASK(7, 0),
147 		.ro = ~0,
167 		.ro = (GENMASK(15, 8) | ((PCI_BRIDGE_CTL_FAST_BACK) << 16)),
181 		.ro = GENMASK(30, 0),
191 		.ro = BIT(15) | GENMASK(5, 0),
207 		.ro = GENMASK(5, 4) << 16,
215 		.ro = lower_32_bits(~(BIT(23) | PCI_EXP_LNKCAP_CLKPM)),
227 		.ro = GENMASK(13, 0) << 16,
232 		.ro = ~0,
247 		.ro = (PCI_EXP_SLTSTA_MRLSS | PCI_EXP_SLTSTA_PDS |
261 		.ro = PCI_EXP_RTCAP_CRSVIS << 16,
269 		.ro = GENMASK(15, 0) | PCI_EXP_RTSTA_PENDING,
278 		.ro = BIT(31) | GENMASK(23, 0),
293 		.ro = BIT(31) | GENMASK(24, 1),
305 		.ro = (GENMASK(14, 12) | GENMASK(9, 6) | GENMASK(4, 0)) << 16,
401 		bridge->pci_regs_behavior[PCI_CACHE_LINE_SIZE / 4].ro &=
403 		bridge->pci_regs_behavior[PCI_COMMAND / 4].ro &=
409 		bridge->pci_regs_behavior[PCI_PRIMARY_BUS / 4].ro &=
411 		bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro &=
417 		bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].ro &=
424 		bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
429 		bridge->pci_regs_behavior[PCI_COMMAND / 4].ro |= PCI_COMMAND_IO;
431 		bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro |= GENMASK(15, 0);
433 		bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].ro = ~0;
516 		*value &= behavior[reg / 4].ro | behavior[reg / 4].rw |