drivers/pci/pci-acpi.c

177 	u32 revision = fields[1].integer.value;
187 		hpx0->cache_line_size = fields[2].integer.value;
188 		hpx0->latency_timer   = fields[3].integer.value;
189 		hpx0->enable_serr     = fields[4].integer.value;
190 		hpx0->enable_perr     = fields[5].integer.value;
227 	u32 revision = fields[1].integer.value;
237 		hpx1->max_mem_read  = fields[2].integer.value;
238 		hpx1->avg_max_split = fields[3].integer.value;
239 		hpx1->tot_max_split = fields[4].integer.value;
376 	u32 revision = fields[1].integer.value;
386 		hpx2->unc_err_mask_and      = fields[2].integer.value;
387 		hpx2->unc_err_mask_or       = fields[3].integer.value;
388 		hpx2->unc_err_sever_and     = fields[4].integer.value;
389 		hpx2->unc_err_sever_or      = fields[5].integer.value;
390 		hpx2->cor_err_mask_and      = fields[6].integer.value;
391 		hpx2->cor_err_mask_or       = fields[7].integer.value;
392 		hpx2->adv_err_cap_and       = fields[8].integer.value;
393 		hpx2->adv_err_cap_or        = fields[9].integer.value;
394 		hpx2->pci_exp_devctl_and    = fields[10].integer.value;
395 		hpx2->pci_exp_devctl_or     = fields[11].integer.value;
396 		hpx2->pci_exp_lnkctl_and    = fields[12].integer.value;
397 		hpx2->pci_exp_lnkctl_or     = fields[13].integer.value;
398 		hpx2->sec_unc_err_sever_and = fields[14].integer.value;
399 		hpx2->sec_unc_err_sever_or  = fields[15].integer.value;
400 		hpx2->sec_unc_err_mask_and  = fields[16].integer.value;
401 		hpx2->sec_unc_err_mask_or   = fields[17].integer.value;
572 	hpx3_reg->device_type            = reg_fields[0].integer.value;
573 	hpx3_reg->function_type          = reg_fields[1].integer.value;
574 	hpx3_reg->config_space_location  = reg_fields[2].integer.value;
575 	hpx3_reg->pci_exp_cap_id         = reg_fields[3].integer.value;
576 	hpx3_reg->pci_exp_cap_ver        = reg_fields[4].integer.value;
577 	hpx3_reg->pci_exp_vendor_id      = reg_fields[5].integer.value;
578 	hpx3_reg->dvsec_id               = reg_fields[6].integer.value;
579 	hpx3_reg->dvsec_rev              = reg_fields[7].integer.value;
580 	hpx3_reg->match_offset           = reg_fields[8].integer.value;
581 	hpx3_reg->match_mask_and         = reg_fields[9].integer.value;
582 	hpx3_reg->match_value            = reg_fields[10].integer.value;
583 	hpx3_reg->reg_offset             = reg_fields[11].integer.value;
584 	hpx3_reg->reg_mask_and           = reg_fields[12].integer.value;
585 	hpx3_reg->reg_mask_or            = reg_fields[13].integer.value;
597 	revision = fields[1].integer.value;
600 		desc_count = fields[2].integer.value;
661 		type = fields[0].integer.value;
731 	hpx0.cache_line_size = fields[0].integer.value;
732 	hpx0.latency_timer   = fields[1].integer.value;
733 	hpx0.enable_serr     = fields[2].integer.value;
734 	hpx0.enable_perr     = fields[3].integer.value;
1040 	    obj->integer.value == 1)
1223 	if (obj->integer.value == 1) {
1388 			value = (int)elements[0].integer.value / 1000;
1393 			value = (int)elements[3].integer.value / 1000;