controller/dwc/pcie-al.c

26 	struct al_pcie_acpi *pcie = cfg->priv;
27 	void __iomem *dbi_base = pcie->dbi_base;
92 #include "pcie-designware.h"
142 static inline u32 al_pcie_controller_readl(struct al_pcie *pcie, u32 offset)
144 	return readl_relaxed(pcie->controller_base + offset);
147 static inline void al_pcie_controller_writel(struct al_pcie *pcie, u32 offset,
150 	writel_relaxed(val, pcie->controller_base + offset);
153 static int al_pcie_rev_id_get(struct al_pcie *pcie, unsigned int *rev_id)
158 	dev_rev_id_val = al_pcie_controller_readl(pcie, AXI_BASE_OFFSET +
174 		dev_err(pcie->dev, "Unsupported dev_id_val (0x%x)\n",
179 	dev_dbg(pcie->dev, "dev_id_val: 0x%x\n", dev_id_val);
184 static int al_pcie_reg_offsets_set(struct al_pcie *pcie)
186 	switch (pcie->controller_rev_id) {
188 		pcie->reg_offsets.ob_ctrl = OB_CTRL_REV1_2_OFFSET;
192 		pcie->reg_offsets.ob_ctrl = OB_CTRL_REV3_5_OFFSET;
195 		dev_err(pcie->dev, "Unsupported controller rev_id: 0x%x\n",
196 			pcie->controller_rev_id);
203 static inline void al_pcie_target_bus_set(struct al_pcie *pcie,
212 	al_pcie_controller_writel(pcie, AXI_BASE_OFFSET +
213 				  pcie->reg_offsets.ob_ctrl + CFG_TARGET_BUS,
221 	struct al_pcie *pcie = to_al_pcie(to_dw_pcie_from_pp(pp));
223 	struct al_pcie_target_bus_cfg *target_bus_cfg = &pcie->target_bus_cfg;
228 		dev_dbg(pcie->pci->dev, "Changing target bus busnum val from 0x%x to 0x%x\n",
231 		al_pcie_target_bus_set(pcie,
245 static void al_pcie_config_prepare(struct al_pcie *pcie)
248 	struct dw_pcie_rp *pp = &pcie->pci->pp;
257 	target_bus_cfg = &pcie->target_bus_cfg;
259 	ecam_bus_mask = (pcie->ecam_size >> PCIE_ECAM_BUS_SHIFT) - 1;
261 		dev_warn(pcie->dev, "ECAM window size is larger than 256MB. Cutting off at 256\n");
271 	al_pcie_target_bus_set(pcie, target_bus_cfg->reg_val,
278 	cfg_control_offset = AXI_BASE_OFFSET + pcie->reg_offsets.ob_ctrl +
281 	cfg_control = al_pcie_controller_readl(pcie, cfg_control_offset);
289 	al_pcie_controller_writel(pcie, cfg_control_offset, reg);
295 	struct al_pcie *pcie = to_al_pcie(pci);
300 	rc = al_pcie_rev_id_get(pcie, &pcie->controller_rev_id);
304 	rc = al_pcie_reg_offsets_set(pcie);
308 	al_pcie_config_prepare(pcie);
363 	{ .compatible = "amazon,al-alpine-v2-pcie",
365 	{ .compatible = "amazon,al-alpine-v3-pcie",
372 		.name	= "al-pcie",