Lines Matching refs:peer
24 * the peer memory windows.
89 * inbound memory windows for each peer (where N is the number of peers).
99 int peer, peer_widx;
114 for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {
115 peer_widx = ntb_peer_highest_mw_idx(ntb, peer);
119 ret = ntb_mw_get_align(ntb, peer, peer_widx, &addr_align,
127 for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {
128 peer_widx = ntb_peer_highest_mw_idx(ntb, peer);
134 ret = ntb_mw_get_align(ntb, peer, peer_widx, NULL,
144 ret = ntb_mw_set_trans(ntb, peer, peer_widx,
156 for (i = 0; i < peer; i++) {
157 peer_widx = ntb_peer_highest_mw_idx(ntb, peer);
176 int peer;
179 for (peer = 0; peer < ntb_peer_port_count(ntb); peer++) {
180 peer_widx = ntb_peer_highest_mw_idx(ntb, peer);
184 ntb_mw_clear_trans(ntb, peer, peer_widx);
269 * it. The descriptor can then be sent to a peer to trigger
356 * ntb_msi_peer_trigger() - Trigger an interrupt handler on a peer
358 * @peer: Peer index
361 * This function triggers an interrupt on a peer. It requires
362 * the descriptor structure to have been passed from that peer
367 int ntb_msi_peer_trigger(struct ntb_dev *ntb, int peer,
375 idx = desc->addr_offset / sizeof(*ntb->msi->peer_mws[peer]);
377 iowrite32(desc->data, &ntb->msi->peer_mws[peer][idx]);
384 * ntb_msi_peer_addr() - Get the DMA address to trigger a peer's MSI interrupt
386 * @peer: Peer index
397 int ntb_msi_peer_addr(struct ntb_dev *ntb, int peer,
401 int peer_widx = ntb_peer_mw_count(ntb) - 1 - peer;