hw/intel/ntb_hw_gen3.c

155 	iowrite64(bar_addr, mmio + GEN3_IMBAR1XLMT_OFFSET);
160 	iowrite64(bar_addr, mmio + GEN3_IMBAR2XLMT_OFFSET);
165 	iowrite64(0, mmio + GEN3_IMBAR1XBASE_OFFSET);
166 	iowrite64(0, mmio + GEN3_IMBAR2XBASE_OFFSET);
490 	iowrite64(addr, mmio + xlat_reg);
493 		iowrite64(0, mmio + xlat_reg);
500 	iowrite64(limit, mmio + limit_reg);
503 		iowrite64(base, mmio + limit_reg);
504 		iowrite64(0, mmio + xlat_reg);
521 	iowrite64(limit, mmio + limit_reg);
524 		iowrite64(base, mmio + limit_reg);
525 		iowrite64(0, mmio + xlat_reg);