hw/intel/ntb_hw_gen1.c

1298 	phys_addr_t bar_addr;
1391 		bar_addr = addr->bar0_addr;
1393 		bar_addr = addr->bar2_addr64;
1395 		bar_addr = addr->bar4_addr64;
1397 		bar_addr = addr->bar4_addr32;
1399 		bar_addr = addr->bar5_addr32;
1403 	dev_dbg(&pdev->dev, "SBAR01 %#018llx\n", bar_addr);
1404 	iowrite64(bar_addr, mmio + XEON_SBAR0BASE_OFFSET);
1411 	bar_addr = addr->bar2_addr64 + (b2b_bar == 2 ? ndev->b2b_off : 0);
1412 	iowrite64(bar_addr, mmio + XEON_SBAR23BASE_OFFSET);
1413 	bar_addr = ioread64(mmio + XEON_SBAR23BASE_OFFSET);
1414 	dev_dbg(&pdev->dev, "SBAR23 %#018llx\n", bar_addr);
1417 		bar_addr = addr->bar4_addr64 +
1419 		iowrite64(bar_addr, mmio + XEON_SBAR45BASE_OFFSET);
1420 		bar_addr = ioread64(mmio + XEON_SBAR45BASE_OFFSET);
1421 		dev_dbg(&pdev->dev, "SBAR45 %#018llx\n", bar_addr);
1423 		bar_addr = addr->bar4_addr32 +
1425 		iowrite32(bar_addr, mmio + XEON_SBAR4BASE_OFFSET);
1426 		bar_addr = ioread32(mmio + XEON_SBAR4BASE_OFFSET);
1427 		dev_dbg(&pdev->dev, "SBAR4 %#010llx\n", bar_addr);
1429 		bar_addr = addr->bar5_addr32 +
1431 		iowrite32(bar_addr, mmio + XEON_SBAR5BASE_OFFSET);
1432 		bar_addr = ioread32(mmio + XEON_SBAR5BASE_OFFSET);
1433 		dev_dbg(&pdev->dev, "SBAR5 %#010llx\n", bar_addr);
1438 	bar_addr = addr->bar2_addr64 + (b2b_bar == 2 ? ndev->b2b_off : 0);
1439 	iowrite64(bar_addr, mmio + XEON_SBAR23LMT_OFFSET);
1440 	bar_addr = ioread64(mmio + XEON_SBAR23LMT_OFFSET);
1441 	dev_dbg(&pdev->dev, "SBAR23LMT %#018llx\n", bar_addr);
1444 		bar_addr = addr->bar4_addr64 +
1446 		iowrite64(bar_addr, mmio + XEON_SBAR45LMT_OFFSET);
1447 		bar_addr = ioread64(mmio + XEON_SBAR45LMT_OFFSET);
1448 		dev_dbg(&pdev->dev, "SBAR45LMT %#018llx\n", bar_addr);
1450 		bar_addr = addr->bar4_addr32 +
1452 		iowrite32(bar_addr, mmio + XEON_SBAR4LMT_OFFSET);
1453 		bar_addr = ioread32(mmio + XEON_SBAR4LMT_OFFSET);
1454 		dev_dbg(&pdev->dev, "SBAR4LMT %#010llx\n", bar_addr);
1456 		bar_addr = addr->bar5_addr32 +
1458 		iowrite32(bar_addr, mmio + XEON_SBAR5LMT_OFFSET);
1459 		bar_addr = ioread32(mmio + XEON_SBAR5LMT_OFFSET);
1460 		dev_dbg(&pdev->dev, "SBAR5LMT %#05llx\n", bar_addr);
1483 	bar_addr = peer_addr->bar2_addr64;
1484 	iowrite64(bar_addr, mmio + XEON_PBAR23XLAT_OFFSET);
1485 	bar_addr = ioread64(mmio + XEON_PBAR23XLAT_OFFSET);
1486 	dev_dbg(&pdev->dev, "PBAR23XLAT %#018llx\n", bar_addr);
1489 		bar_addr = peer_addr->bar4_addr64;
1490 		iowrite64(bar_addr, mmio + XEON_PBAR45XLAT_OFFSET);
1491 		bar_addr = ioread64(mmio + XEON_PBAR45XLAT_OFFSET);
1492 		dev_dbg(&pdev->dev, "PBAR45XLAT %#018llx\n", bar_addr);
1494 		bar_addr = peer_addr->bar4_addr32;
1495 		iowrite32(bar_addr, mmio + XEON_PBAR4XLAT_OFFSET);
1496 		bar_addr = ioread32(mmio + XEON_PBAR4XLAT_OFFSET);
1497 		dev_dbg(&pdev->dev, "PBAR4XLAT %#010llx\n", bar_addr);
1499 		bar_addr = peer_addr->bar5_addr32;
1500 		iowrite32(bar_addr, mmio + XEON_PBAR5XLAT_OFFSET);
1501 		bar_addr = ioread32(mmio + XEON_PBAR5XLAT_OFFSET);
1502 		dev_dbg(&pdev->dev, "PBAR5XLAT %#010llx\n", bar_addr);
1507 		bar_addr = peer_addr->bar0_addr;
1509 		bar_addr = peer_addr->bar2_addr64;
1511 		bar_addr = peer_addr->bar4_addr64;
1513 		bar_addr = peer_addr->bar4_addr32;
1515 		bar_addr = peer_addr->bar5_addr32;
1520 	dev_dbg(&pdev->dev, "B2BXLAT %#018llx\n", bar_addr);
1521 	iowrite32(bar_addr, mmio + XEON_B2B_XLAT_OFFSETL);
1522 	iowrite32(bar_addr >> 32, mmio + XEON_B2B_XLAT_OFFSETU);