ti/wl1251/boot.c

17 void wl1251_boot_target_enable_interrupts(struct wl1251 *wl)
19 	wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
20 	wl1251_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
23 int wl1251_boot_soft_reset(struct wl1251 *wl)
29 	wl1251_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
34 		boot_data = wl1251_reg_read32(wl, ACX_REG_SLV_SOFT_RESET);
50 	wl1251_reg_write32(wl, ENABLE, 0x0);
53 	wl1251_reg_write32(wl, SPARE_A2, 0xffff);
58 int wl1251_boot_init_seq(struct wl1251 *wl)
80 	scr_pad6 = wl1251_reg_read32(wl, SCR_PAD6);
84 	elp_cmd = wl1251_reg_read32(wl, ELP_CMD);
91 	wl1251_reg_write32(wl, PLL_CAL_TIME, 0x9);
96 	wl1251_reg_write32(wl, CLK_BUF_TIME, 0x6);
104 	wl1251_reg_write32(wl, ELP_CFG_MODE, tmp);
108 	wl1251_reg_write32(wl, ELP_CMD, elp_cmd);
112 	wl1251_reg_write32(wl, CFG_PLL_SYNC_CNT, 0x20);
115 	init_data = wl1251_reg_read32(wl, CLK_REQ_TIME);
125 	wl1251_reg_write32(wl, CLK_REQ_TIME, tmp);
128 	wl1251_reg_write32(wl, 0x003058cc, 0x4B5);
131 	wl1251_reg_write32(wl, 0x003058d4, 0x50);
134 	wl1251_reg_write32(wl, 0x00305948, 0x11c001);
140 	wl1251_reg_write32(wl, 0x003058f4, 0x1e);
144 	wl1251_reg_write32(wl, 0x00305840, tmp);
150 	wl1251_reg_write32(wl, 0x00305844, tmp);
153 	wl1251_reg_write32(wl, 0x00305848, 0x3039);
162 	wl1251_reg_write32(wl, 0x00305854, tmp);
169 	wl1251_reg_write32(wl, 0x00305858, tmp);
177 	wl1251_reg_write32(wl, 0x003058f8, tmp);
185 	wl1251_reg_write32(wl, 0x003058f0, 0x29);
188 	wl1251_reg_write32(wl, ELP_CMD, elp_cmd | 0x1);
196 static void wl1251_boot_set_ecpu_ctrl(struct wl1251 *wl, u32 flag)
201 	cpu_ctrl = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);
205 	wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);
208 int wl1251_boot_run_firmware(struct wl1251 *wl)
213 	wl1251_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
215 	chip_id = wl1251_reg_read32(wl, CHIP_ID_B);
219 	if (chip_id != wl->chip_id) {
228 		acx_intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
237 			wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
250 	wl->cmd_box_addr = wl1251_reg_read32(wl, REG_COMMAND_MAILBOX_PTR);
253 	wl->event_box_addr = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
256 	wl1251_set_partition(wl, WL1251_PART_WORK_MEM_START,
262 		     wl->cmd_box_addr, wl->event_box_addr);
264 	wl1251_acx_fw_version(wl, wl->fw_ver, sizeof(wl->fw_ver));
272 	wl1251_enable_interrupts(wl);
275 	wl->intr_mask = WL1251_ACX_INTR_RX0_DATA |
281 	wl1251_boot_target_enable_interrupts(wl);
283 	wl->event_mask = SCAN_COMPLETE_EVENT_ID | BSS_LOSE_EVENT_ID |
291 	ret = wl1251_event_unmask(wl);
297 	wl1251_event_mbox_config(wl);
303 static int wl1251_boot_upload_firmware(struct wl1251 *wl)
312 		     wl1251_reg_read32(wl, CHIP_ID_B));
315 	fw_data_len =  (wl->fw[4] << 24) | (wl->fw[5] << 16) |
316 		(wl->fw[6] << 8) | (wl->fw[7]);
332 	wl1251_set_partition(wl, WL1251_PART_DOWN_MEM_START,
350 			wl1251_set_partition(wl,
359 		p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
366 		wl1251_mem_write(wl, addr, buf, len);
373 	p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
381 	wl1251_mem_write(wl, addr, buf, len);
388 static int wl1251_boot_upload_nvs(struct wl1251 *wl)
395 	nvs = wl->nvs;
401 	nvs_len = wl->nvs_len;
402 	nvs_start = wl->fw_len;
427 			wl1251_mem_write32(wl, dest_addr, val);
443 	wl1251_set_partition(wl, nvs_start,
457 		wl1251_mem_write32(wl, nvs_start, val);
467 int wl1251_boot(struct wl1251 *wl)
473 	wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, ECPU_CONTROL_HALT);
475 	ret = wl1251_boot_soft_reset(wl);
480 	if (wl->use_eeprom) {
481 		wl1251_reg_write32(wl, ACX_REG_EE_START, START_EEPROM_MGR);
484 		wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, USE_EEPROM);
486 		ret = wl1251_boot_upload_nvs(wl);
492 		wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len);
496 	tmp = wl1251_reg_read32(wl, SCR_PAD2);
499 	wl->boot_attr.radio_type = (tmp & 0x0000FF00) >> 8;
500 	wl->boot_attr.major = (tmp & 0x00FF0000) >> 16;
501 	tmp = wl1251_reg_read32(wl, SCR_PAD3);
504 	wl->boot_attr.minor = (tmp & 0x00FF0000) >> 16;
509 		     wl->boot_attr.radio_type, wl->boot_attr.major,
510 		     wl->boot_attr.minor, minor_minor_e2_ver);
512 	ret = wl1251_boot_init_seq(wl);
517 	boot_data = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);
530 	ret = wl1251_boot_upload_firmware(wl);
535 	ret = wl1251_boot_run_firmware(wl);